soc/intel: Replace config_of_path() with config_of_soc()
The previously provided device path made no difference, all
integrated PCI devices point back to the same chip_info
structure.
Change reduces the exposure of various SA_DEVFN_xx and
PCH_DEVFN_xx from (ugly) soc/pci_devs.h.
Change-Id: Ibf13645fdd3ef7fd3d5c8217bb24d7ede045c790
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c
index 89770c0..6846594 100644
--- a/src/soc/intel/cannonlake/acpi.c
+++ b/src/soc/intel/cannonlake/acpi.c
@@ -145,7 +145,7 @@
int *set;
int i;
- config_t *config = config_of_path(SA_DEVFN_ROOT);
+ config_t *config = config_of_soc();
int is_s0ix_enable = config->s0ix_enable;
@@ -166,7 +166,7 @@
void soc_power_states_generation(int core_id, int cores_per_package)
{
- config_t *config = config_of_path(SA_DEVFN_ROOT);
+ config_t *config = config_of_soc();
/* Generate P-state tables */
if (config->eist_enable)
@@ -177,7 +177,7 @@
{
const uint16_t pmbase = ACPI_BASE_ADDRESS;
const struct soc_intel_cannonlake_config *config;
- config = config_of_path(PCH_DEVFN_LPC);
+ config = config_of_soc();
if (!config->PmTimerDisabled) {
fadt->pm_tmr_blk = pmbase + PM1_TMR;
@@ -202,7 +202,7 @@
void acpi_create_gnvs(struct global_nvs_t *gnvs)
{
const struct soc_intel_cannonlake_config *config;
- config = config_of_path(PCH_DEVFN_LPC);
+ config = config_of_soc();
/* Set unknown wake source */
gnvs->pm1i = -1;
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index c0810fb..0ce2f1a 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -170,7 +170,7 @@
static void soc_fill_gpio_pm_configuration(void)
{
uint8_t value[TOTAL_GPIO_COMM];
- const config_t *config = config_of_path(SA_DEVFN_ROOT);
+ const config_t *config = config_of_soc();
if (config->gpio_override_pm)
memcpy(value, config->gpio_pm, sizeof(uint8_t) *
diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c
index 0f4d52e..c58b9ad 100644
--- a/src/soc/intel/cannonlake/cpu.c
+++ b/src/soc/intel/cannonlake/cpu.c
@@ -106,7 +106,7 @@
unsigned int tdp, min_power, max_power, max_time, tdp_pl2, tdp_pl1;
u8 power_limit_1_val;
- config_t *conf = config_of_path(SA_DEVFN_ROOT);
+ config_t *conf = config_of_soc();
if (power_limit_1_time >= ARRAY_SIZE(power_limit_time_sec_to_msr))
power_limit_1_time = ARRAY_SIZE(power_limit_time_sec_to_msr) - 1;
@@ -234,7 +234,7 @@
static void configure_isst(void)
{
- config_t *conf = config_of_path(SA_DEVFN_ROOT);
+ config_t *conf = config_of_soc();
msr_t msr;
if (conf->speed_shift_enable) {
@@ -259,7 +259,7 @@
static void configure_misc(void)
{
- config_t *conf = config_of_path(SA_DEVFN_ROOT);
+ config_t *conf = config_of_soc();
msr_t msr;
msr = rdmsr(IA32_MISC_ENABLE);
@@ -361,7 +361,7 @@
static void configure_thermal_target(void)
{
- config_t *conf = config_of_path(SA_DEVFN_ROOT);
+ config_t *conf = config_of_soc();
msr_t msr;
/* Set TCC activation offset if supported */
@@ -387,7 +387,7 @@
const struct soc_intel_cannonlake_config *config;
msr_t msr;
- config = config_of_path(SA_DEVFN_ROOT);
+ config = config_of_soc();
/* Enable PM timer emulation only if ACPI PM timer is disabled */
if (!config->PmTimerDisabled)
diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c
index c99653b..115b732 100644
--- a/src/soc/intel/cannonlake/finalize.c
+++ b/src/soc/intel/cannonlake/finalize.c
@@ -84,7 +84,7 @@
* point and hence removed from the root bus. pcidev_path_on_root thus
* returns NULL for PCH_DEV_PMC device.
*/
- config = config_of_path(SA_DEVFN_ROOT);
+ config = config_of_soc();
pmcbase = pmc_mmio_regs();
if (config->PmTimerDisabled) {
reg8 = read8(pmcbase + PCH_PWRM_ACPI_TMR_CTL);
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index 76d40aa..b580620 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -99,7 +99,7 @@
static void parse_devicetree(FSP_S_CONFIG *params)
{
- const config_t *config = config_of_path(SA_DEVFN_ROOT);
+ const config_t *config = config_of_soc();
parse_devicetree_param(config, params);
}
@@ -145,7 +145,7 @@
FSP_S_TEST_CONFIG *tconfig = &supd->FspsTestConfig;
struct device *dev;
- config_t *config = config_of_path(SA_DEVFN_ROOT);
+ config_t *config = config_of_soc();
/* Parse device tree and enable/disable devices */
parse_devicetree(params);
diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c
index b9f455f..c0bb9ae 100644
--- a/src/soc/intel/cannonlake/pmc.c
+++ b/src/soc/intel/cannonlake/pmc.c
@@ -102,7 +102,7 @@
static void pmc_init(void *unused)
{
- const config_t *config = config_of_path(SA_DEVFN_ROOT);
+ const config_t *config = config_of_soc();
rtc_init();
diff --git a/src/soc/intel/cannonlake/pmutil.c b/src/soc/intel/cannonlake/pmutil.c
index 1626e30..a543861 100644
--- a/src/soc/intel/cannonlake/pmutil.c
+++ b/src/soc/intel/cannonlake/pmutil.c
@@ -175,7 +175,7 @@
void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2)
{
DEVTREE_CONST struct soc_intel_cannonlake_config *config;
- config = config_of_path(SA_DEVFN_ROOT);
+ config = config_of_soc();
/* Assign to out variable */
*dw0 = config->gpe0_dw0;
diff --git a/src/soc/intel/cannonlake/smihandler.c b/src/soc/intel/cannonlake/smihandler.c
index b8ceec0..4d0b241 100644
--- a/src/soc/intel/cannonlake/smihandler.c
+++ b/src/soc/intel/cannonlake/smihandler.c
@@ -79,7 +79,7 @@
{
const struct soc_intel_cannonlake_config *config;
- config = config_of_path(PCH_DEVFN_CSE);
+ config = config_of_soc();
if (!config->HeciEnabled && CONFIG(HECI_DISABLE_USING_SMM))
pch_disable_heci();