commit d5d4fbc072c489e469df2c703a289be0d5f3bbac
author Angel Pons <th3fanbus@gmail.com> Sun May 31 01:03:59 2020 +0200
committer Angel Pons <th3fanbus@gmail.com> Mon Jun 01 17:05:58 2020 +0000
tree 77ac14520a2c96ce169624b3c4a5743c30e20cb9
parent d49690bbe87134a67dc9efab11eadc96944fa15f

sb/intel/lynxpoint: Restore lost PCI_COMMAND_MASTER bits

Commit 73ae076 "fixed" accesses to the PCI command register that were
not 16 bits, but also lost some bits to be written in the process.

Change-Id: I4eb62a0433a4563827a69c9e39c17ddd2eb8cd23
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41945
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>

src/southbridge/intel/lynxpoint/early_usb.c

diff --git a/src/southbridge/intel/lynxpoint/early_usb.c b/src/southbridge/intel/lynxpoint/early_usb.c
index 06ddd08..a753681 100644
--- a/src/southbridge/intel/lynxpoint/early_usb.c
+++ b/src/southbridge/intel/lynxpoint/early_usb.c
@@ -25,7 +25,7 @@
 static void enable_usb_bar_on_device(pci_devfn_t dev, u32 bar)
 {
 	pci_write_config32(dev, PCI_BASE_ADDRESS_0, bar);
-	pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MEMORY);
+	pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
 }
 
 void enable_usb_bar(void)

src/southbridge/intel/lynxpoint/me_9.x.c

diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c
index 8914edf..6223a3d 100644
--- a/src/southbridge/intel/lynxpoint/me_9.x.c
+++ b/src/southbridge/intel/lynxpoint/me_9.x.c
@@ -735,7 +735,7 @@
 	mei_base_address = (u32 *)(uintptr_t)res->base;
 
 	/* Ensure Memory and Bus Master bits are set */
-	pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MEMORY);
+	pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
 
 	/* Clean up status for next message */
 	read_host_csr(&host);

src/southbridge/intel/lynxpoint/serialio.c

diff --git a/src/southbridge/intel/lynxpoint/serialio.c b/src/southbridge/intel/lynxpoint/serialio.c
index e093508..adb9067 100644
--- a/src/southbridge/intel/lynxpoint/serialio.c
+++ b/src/southbridge/intel/lynxpoint/serialio.c
@@ -137,7 +137,7 @@
 	printk(BIOS_DEBUG, "Initializing Serial IO device\n");
 
 	/* Ensure memory and bus master are enabled */
-	pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MEMORY);
+	pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
 
 	/* Find BAR0 and BAR1 */
 	bar0 = find_resource(dev, PCI_BASE_ADDRESS_0);