commit d45f33804db1e4181e2f657727adc51842aa9a60
author Elyes HAOUAS <ehaouas@noos.fr> Sun Apr 28 18:04:35 2019 +0200
committer Nico Huber <nico.h@gmx.de> Mon Apr 29 15:58:34 2019 +0000
tree dc242be28fc20b0ad27d561d62d982cce05e33de
parent 82d4642805bb3d5018e2580c4a7edfc6bdb9138a

nb/intel/nehalem: Use system_reset() and full_reset()

Use already defined system_reset() and full_reset() functions.

Change-Id: Ib7e399b5186aa704d0388c4a4b18480f2e3799f3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32495
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

src/northbridge/intel/nehalem/raminit.c

diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c
index 3164a58..5b6077f 100644
--- a/src/northbridge/intel/nehalem/raminit.c
+++ b/src/northbridge/intel/nehalem/raminit.c
@@ -22,6 +22,7 @@
 #include <device/pci_ops.h>
 #include <cpu/x86/msr.h>
 #include <cbmem.h>
+#include <cf9_reset.h>
 #include <arch/cbfs.h>
 #include <ip_checksum.h>
 #include <pc80/mc146818rtc.h>
@@ -3681,8 +3682,7 @@
 	if ((x2ca8 & 1) || (x2ca8 == 8 && !s3resume)) {
 		printk(BIOS_DEBUG, "soft reset detected, rebooting properly\n");
 		MCHBAR8(0x2ca8) = 0;
-		outb(0x6, 0xcf9);
-		halt();
+		system_reset();
 	}
 #if 0
 	if (!s3resume) {
@@ -3907,8 +3907,7 @@
 
 			printk(BIOS_INFO,
 			       "Interrupted RAM init, reset required.\n");
-			outb(0x6, 0xcf9);
-			halt();
+			system_reset();
 		}
 	}
 
@@ -4346,8 +4345,7 @@
 			       "Couldn't find training data. Rebooting\n");
 			reg32 = inl(DEFAULT_PMBASE + 0x04);
 			outl(reg32 & ~(7 << 10), DEFAULT_PMBASE + 0x04);
-			outb(0xe, 0xcf9);
-			halt();
+			full_reset();
 		}
 		int tm;
 		info.training = *info.cached_training;
@@ -4788,7 +4786,6 @@
 		outl(reg32 & ~(7 << 10), DEFAULT_PMBASE + 0x04);
 
 		/* Failed S3 resume, reset to come up cleanly */
-		outb(0xe, 0xcf9);
-		halt();
+		full_reset();
 	}
 }