bd82x6x, ibexpeak: Support fully locking ROM on S3 resume.
Currently only RO-lock is supported. Make full lock available as an option.
Change-Id: Ib68a1e82733a51053a9adc80ac501b6205c6b8a7
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/10191
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
diff --git a/src/southbridge/intel/bd82x6x/finalize.c b/src/southbridge/intel/bd82x6x/finalize.c
index ad2586c..df7b070 100644
--- a/src/southbridge/intel/bd82x6x/finalize.c
+++ b/src/southbridge/intel/bd82x6x/finalize.c
@@ -25,13 +25,16 @@
void intel_pch_finalize_smm(void)
{
-#if CONFIG_LOCK_SPI_ON_RESUME
- /* Copy flash regions from FREG0-4 to PR0-4
- and enable write protection bit31 */
- int i;
- for (i = 0; i < 20; i += 4)
- RCBA32(0x3874 + i) = RCBA32(0x3854 + i) | (1 << 31);
-#endif
+ if (CONFIG_LOCK_SPI_ON_RESUME_RO || CONFIG_LOCK_SPI_ON_RESUME_NO_ACCESS) {
+ /* Copy flash regions from FREG0-4 to PR0-4
+ and enable write protection bit31 */
+ int i;
+ u32 lockmask = (1 << 31);
+ if (CONFIG_LOCK_SPI_ON_RESUME_NO_ACCESS)
+ lockmask |= (1 << 15);
+ for (i = 0; i < 20; i += 4)
+ RCBA32(0x3874 + i) = RCBA32(0x3854 + i) | lockmask;
+ }
/* Set SPI opcode menu */
RCBA16(0x3894) = SPI_OPPREFIX;