src/superio: Remove unused superio chips
These SIOs are not being used or tested by abuild, so remove them from the
tree. The only 3 currently unused SIOs that don't get removed here have board
ports in review.
src/superio/fintek/f71805f
src/superio/fintek/f71872
src/superio/intel/i8900
src/superio/ite/it8671f
src/superio/ite/it8716f
src/superio/nsc/pc87309
src/superio/nsc/pc87360
src/superio/nsc/pc87366
src/superio/nsc/pc97317
src/superio/smsc/dme1737
src/superio/smsc/lpc47b272
src/superio/smsc/lpc47b397
src/superio/smsc/sch4037
src/superio/smsc/sio1036
src/superio/via/vt1211
src/superio/winbond/w83697hf
src/superio/winbond/wpcd376i
Signed-off-by: Martin Roth <martin@coreboot.org>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I61d486d2c1e2b85eb292eaa78316c36e1735ebf4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35428
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/src/superio/fintek/f71805f/Kconfig b/src/superio/fintek/f71805f/Kconfig
deleted file mode 100644
index 7f06f55..0000000
--- a/src/superio/fintek/f71805f/Kconfig
+++ /dev/null
@@ -1,19 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_FINTEK_F71805F
- bool
- select SUPERIO_FINTEK_COMMON_PRE_RAM
diff --git a/src/superio/fintek/f71805f/Makefile.inc b/src/superio/fintek/f71805f/Makefile.inc
deleted file mode 100644
index 26b23f6..0000000
--- a/src/superio/fintek/f71805f/Makefile.inc
+++ /dev/null
@@ -1,17 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2008 Corey Osgood <corey.osgood@gmail.com>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-ramstage-$(CONFIG_SUPERIO_FINTEK_F71805F) += superio.c
diff --git a/src/superio/fintek/f71805f/f71805f.h b/src/superio/fintek/f71805f/f71805f.h
deleted file mode 100644
index b4ca60a..0000000
--- a/src/superio/fintek/f71805f/f71805f.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Corey Osgood <corey@slightlyhackish.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_FINTEK_F71805F_H
-#define SUPERIO_FINTEK_F71805F_H
-
-/*
- * Datasheet:
- * - Name: F71805F/FG Super H/W Monitor + LPC IO
- * - URL: http://www.fintek.com.tw/eng/products.asp?BID=1&SID=17
- * - PDF: http://www.fintek.com.tw/files/productfiles/F71805F_V025.pdf
- * - Revision: V0.25P
- */
-
-/* Logical Device Numbers (LDN). */
-#define F71805F_FDC 0x00 /* Floppy */
-#define F71805F_SP1 0x01 /* UART1 */
-#define F71805F_SP2 0x02 /* UART2 */
-#define F71805F_PP 0x03 /* Parallel port */
-#define F71805F_HWM 0x04 /* Hardware monitor */
-#define F71805F_GPIO 0x06 /* General Purpose I/O (GPIO) */
-#define F71805F_PME 0x0a /* Power Management Events (PME) */
-
-#endif /* SUPERIO_FINTEK_F71805F_H */
diff --git a/src/superio/fintek/f71805f/superio.c b/src/superio/fintek/f71805f/superio.c
deleted file mode 100644
index 4719923..0000000
--- a/src/superio/fintek/f71805f/superio.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Corey Osgood <corey.osgood@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <stdlib.h>
-#include "f71805f.h"
-
-static void f71805f_init(struct device *dev)
-{
- if (!dev->enabled)
- return;
-
- /* TODO: Might potentially need code for HWM or FDC etc. */
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_alt_enable,
- .init = f71805f_init,
- .ops_pnp_mode = &pnp_conf_mode_8787_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- /* TODO: Some of the 0x07f8 etc. values may not be correct. */
- { NULL, F71805F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, F71805F_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, F71805F_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, F71805F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, F71805F_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
- { NULL, F71805F_GPIO, PNP_IRQ0, },
- { NULL, F71805F_PME, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_fintek_f71805f_ops = {
- CHIP_NAME("Fintek F71805F/FG Super I/O")
- .enable_dev = enable_dev
-};
diff --git a/src/superio/fintek/f71872/Kconfig b/src/superio/fintek/f71872/Kconfig
deleted file mode 100644
index 516ff094..0000000
--- a/src/superio/fintek/f71872/Kconfig
+++ /dev/null
@@ -1,19 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_FINTEK_F71872
- bool
- select SUPERIO_FINTEK_COMMON_PRE_RAM
diff --git a/src/superio/fintek/f71872/Makefile.inc b/src/superio/fintek/f71872/Makefile.inc
deleted file mode 100644
index 7237d0b..0000000
--- a/src/superio/fintek/f71872/Makefile.inc
+++ /dev/null
@@ -1,17 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2008 Corey Osgood <corey.osgood@gmail.com>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-ramstage-$(CONFIG_SUPERIO_FINTEK_F71872) += superio.c
diff --git a/src/superio/fintek/f71872/f71872.h b/src/superio/fintek/f71872/f71872.h
deleted file mode 100644
index afd238c..0000000
--- a/src/superio/fintek/f71872/f71872.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Corey Osgood <corey@slightlyhackish.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_FINTEK_F71872_H
-#define SUPERIO_FINTEK_F71872_H
-
-/* Logical Device Numbers (LDN). */
-#define F71872_FDC 0x00 /* Floppy */
-#define F71872_SP1 0x01 /* UART1 */
-#define F71872_SP2 0x02 /* UART2 */
-#define F71872_PP 0x03 /* Parallel Port */
-#define F71872_HWM 0x04 /* Hardware Monitor */
-#define F71872_KBC 0x05 /* Keyboard/Mouse */
-#define F71872_GPIO 0x06 /* GPIO */
-#define F71872_VID 0x07 /* VID */
-#define F71872_PM 0x0a /* ACPI/PME */
-
-#endif /* SUPERIO_FINTEK_F71872_H */
diff --git a/src/superio/fintek/f71872/superio.c b/src/superio/fintek/f71872/superio.c
deleted file mode 100644
index 3316ee2..0000000
--- a/src/superio/fintek/f71872/superio.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Corey Osgood <corey.osgood@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <stdlib.h>
-#include <pc80/keyboard.h>
-#include "f71872.h"
-
-static void f71872_init(struct device *dev)
-{
-
- if (!dev->enabled)
- return;
-
- switch (dev->path.pnp.device) {
- /* TODO: Might potentially need code for HWM or FDC etc. */
- case F71872_KBC:
- pc_keyboard_init(NO_AUX_DEVICE);
- break;
- }
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_alt_enable,
- .init = f71872_init,
- .ops_pnp_mode = &pnp_conf_mode_8787_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- /* TODO: Some of the 0x07f8 etc. values may not be correct. */
- { NULL, F71872_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, F71872_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, F71872_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, F71872_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, F71872_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
- { NULL, F71872_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
- { NULL, F71872_GPIO, PNP_IRQ0, },
- { NULL, F71872_VID, PNP_IO0, 0x0ff8, },
- { NULL, F71872_PM, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_fintek_f71872_ops = {
- CHIP_NAME("Fintek F71872 Super I/O")
- .enable_dev = enable_dev
-};
diff --git a/src/superio/intel/i8900/Kconfig b/src/superio/intel/i8900/Kconfig
deleted file mode 100644
index ed37f7f..0000000
--- a/src/superio/intel/i8900/Kconfig
+++ /dev/null
@@ -1,17 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_INTEL_I8900
- bool
diff --git a/src/superio/intel/i8900/Makefile.inc b/src/superio/intel/i8900/Makefile.inc
deleted file mode 100644
index 562d5d1..0000000
--- a/src/superio/intel/i8900/Makefile.inc
+++ /dev/null
@@ -1,19 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2008 Arastra, Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-bootblock-$(CONFIG_SUPERIO_INTEL_I8900) += early_serial.c
-romstage-$(CONFIG_SUPERIO_INTEL_I8900) += early_serial.c
-ramstage-$(CONFIG_SUPERIO_INTEL_I8900) += superio.c
diff --git a/src/superio/intel/i8900/early_serial.c b/src/superio/intel/i8900/early_serial.c
deleted file mode 100644
index 681b225..0000000
--- a/src/superio/intel/i8900/early_serial.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Arastra, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include <device/pnp_ops.h>
-#include <device/pnp.h>
-#include "i8900.h"
-
-static void pnp_enter_ext_func_mode(pnp_devfn_t dev)
-{
- u16 port = dev >> 8;
-
- outb(0x80, port);
- outb(0x86, port);
-}
-
-static void pnp_exit_ext_func_mode(pnp_devfn_t dev)
-{
- u16 port = dev >> 8;
-
- outb(0x68, port);
- outb(0x08, port);
-}
-
-/* Enable device interrupts, set UART_CLK predivide. */
-void i8900_configure_uart_clk(pnp_devfn_t dev, u8 predivide)
-{
- pnp_enter_ext_func_mode(dev);
- pnp_write_config(dev, I8900_SIW_CONFIGURATION,
- (predivide << 2) | I8900_ENABLE_SIRQ);
- pnp_exit_ext_func_mode(dev);
-}
-
-void i8900_enable_serial(pnp_devfn_t dev, u16 iobase)
-{
- pnp_enter_ext_func_mode(dev);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
- pnp_set_enable(dev, 1);
- pnp_exit_ext_func_mode(dev);
-}
-
-void i8900_enable_wdt(pnp_devfn_t dev, u16 iobase)
-{
- /* Enable WDT */
- pnp_enter_ext_func_mode(dev);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
- pnp_set_enable(dev, 1);
- pnp_exit_ext_func_mode(dev);
-}
diff --git a/src/superio/intel/i8900/i8900.h b/src/superio/intel/i8900/i8900.h
deleted file mode 100644
index 348d3c4..0000000
--- a/src/superio/intel/i8900/i8900.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Arastra, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_INTEL_I8900_I8900_H
-#define SUPERIO_INTEL_I8900_I8900_H
-
-#include <device/pnp_type.h>
-
-/*
- * The SIW ("Serial I/O and Watchdog Timer") integrated into the i8900 is
- * very similar to a Super I/O, both in functionality and config mechanism.
- *
- * The SIW contains:
- * - UART(s)
- * - Serial interrupt controller
- * - Watchdog timer (WDT)
- * - LPC interface
- */
-
-/* Logical device numbers (LDNs). */
-#define I8900_SP1 0x04 /* Com1 */
-#define I8900_SP2 0x05 /* Com2 */
-#define I8900_WDT 0x06 /* Watchdog timer */
-
-/* Registers and bit definitions: */
-
-#define I8900_SIW_CONFIGURATION 0x29
-
-/*
- * SIW_CONFIGURATION[3:2] = UART_CLK predivide
- * 00: divide by 1
- * 01: divide by 8
- * 10: divide by 26
- * 11: reserved
- */
-#define I8900_UART_CLK_PREDIVIDE_1 0x00
-#define I8900_UART_CLK_PREDIVIDE_8 0x01
-#define I8900_UART_CLK_PREDIVIDE_26 0x02
-#define I8900_ENABLE_SIRQ 0x01
-
-void i8900_configure_uart_clk(pnp_devfn_t dev, u8 predivide);
-void i8900_enable_serial(pnp_devfn_t dev, u16 iobase);
-void i8900_enable_wdt(pnp_devfn_t dev, u16 iobase);
-
-#endif
diff --git a/src/superio/intel/i8900/superio.c b/src/superio/intel/i8900/superio.c
deleted file mode 100644
index 24805bc..0000000
--- a/src/superio/intel/i8900/superio.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Arastra, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stdlib.h>
-#include <device/device.h>
-#include <device/pnp.h>
-#include <drivers/uart/uart8250reg.h>
-#include "i8900.h"
-#include <arch/io.h>
-
-static void pnp_enter_ext_func_mode(struct device *dev)
-{
- outb(0x80, dev->path.pnp.port);
- outb(0x86, dev->path.pnp.port);
-}
-
-static void pnp_exit_ext_func_mode(struct device *dev)
-{
- outb(0x68, dev->path.pnp.port);
- outb(0x08, dev->path.pnp.port);
-}
-
-static void i8900_init(struct device *dev)
-{
- if (!dev->enabled)
- return;
-}
-
-static void i8900_pnp_set_resources(struct device *dev)
-{
- pnp_enter_ext_func_mode(dev);
- pnp_set_resources(dev);
- pnp_exit_ext_func_mode(dev);
-}
-
-static void i8900_pnp_enable_resources(struct device *dev)
-{
- pnp_enter_ext_func_mode(dev);
- pnp_enable_resources(dev);
- pnp_exit_ext_func_mode(dev);
-}
-
-static void i8900_pnp_enable(struct device *dev)
-{
- pnp_enter_ext_func_mode(dev);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, !!dev->enabled);
- pnp_exit_ext_func_mode(dev);
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = i8900_pnp_set_resources,
- .enable_resources = i8900_pnp_enable_resources,
- .enable = i8900_pnp_enable,
- .init = i8900_init,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- { NULL, I8900_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, I8900_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, I8900_WDT, PNP_IO0 | PNP_IRQ0, 0x07f8, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_intel_i8900_ops = {
- CHIP_NAME("Intel 8900 Super I/O")
- .enable_dev = enable_dev,
-};
diff --git a/src/superio/ite/it8671f/Kconfig b/src/superio/ite/it8671f/Kconfig
deleted file mode 100644
index ba63224..0000000
--- a/src/superio/ite/it8671f/Kconfig
+++ /dev/null
@@ -1,19 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_ITE_IT8671F
- bool
- select SUPERIO_ITE_COMMON_PRE_RAM
diff --git a/src/superio/ite/it8671f/Makefile.inc b/src/superio/ite/it8671f/Makefile.inc
deleted file mode 100644
index f625bc1..0000000
--- a/src/superio/ite/it8671f/Makefile.inc
+++ /dev/null
@@ -1,19 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-bootblock-$(CONFIG_SUPERIO_ITE_IT8671F) += early_serial.c
-romstage-$(CONFIG_SUPERIO_ITE_IT8671F) += early_serial.c
-ramstage-$(CONFIG_SUPERIO_ITE_IT8671F) += superio.c
diff --git a/src/superio/ite/it8671f/early_serial.c b/src/superio/ite/it8671f/early_serial.c
deleted file mode 100644
index b5b94df..0000000
--- a/src/superio/ite/it8671f/early_serial.c
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include <device/pnp_type.h>
-#include <device/pnp.h>
-#include <stdint.h>
-#include "it8671f.h"
-
-/* The base address is 0x3f0, 0x3bd, or 0x370, depending on config bytes. */
-#define SIO_BASE 0x3f0
-#define SIO_INDEX SIO_BASE
-#define SIO_DATA (SIO_BASE + 1)
-
-/* Global configuration registers. */
-#define IT8671F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */
-#define IT8671F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
-#define IT8671F_CONFIG_REG_LDE 0x23 /* PnP Logical Device Enable. */
-#define IT8671F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend. */
-
-#define IT8671F_CONFIGURATION_PORT 0x0279 /* Write-only. */
-
-/*
- * Special values used for entering MB PnP mode. The first four bytes of
- * each line determine the address port, the last four are data.
- */
-static const u8 init_values[] = {
- 0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe,
- 0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61,
- 0xb0, 0x58, 0x2c, 0x16, /**/ 0x8b, 0x45, 0xa2, 0xd1,
- 0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39,
-};
-
-static void it8671f_sio_write(u8 ldn, u8 index, u8 value)
-{
- outb(IT8671F_CONFIG_REG_LDN, SIO_BASE);
- outb(ldn, SIO_DATA);
- outb(index, SIO_BASE);
- outb(value, SIO_DATA);
-}
-
-/* Enter the configuration state (MB PnP mode). */
-static void it8671f_enter_conf(void)
-{
- int i;
-
- /* Perform MB PnP setup to put the SIO chip at 0x3f0. */
- /* Base address 0x3f0: 0x86 0x80 0x55 0x55. */
- /* Base address 0x3bd: 0x86 0x80 0x55 0xaa. */
- /* Base address 0x370: 0x86 0x80 0xaa 0x55. */
- outb(0x86, IT8671F_CONFIGURATION_PORT);
- outb(0x80, IT8671F_CONFIGURATION_PORT);
- outb(0x55, IT8671F_CONFIGURATION_PORT);
- outb(0x55, IT8671F_CONFIGURATION_PORT);
-
- /* Sequentially write the 32 special values. */
- for (i = 0; i < 32; i++)
- outb(init_values[i], SIO_BASE);
-}
-
-/* Exit the configuration state (MB PnP mode). */
-static void it8671f_exit_conf(void)
-{
- it8671f_sio_write(0x00, IT8671F_CONFIG_REG_CC, 0x02);
-}
-
-/* Select 48MHz CLKIN (24MHz is the default). */
-void it8671f_48mhz_clkin(void)
-{
- it8671f_enter_conf();
- it8671f_sio_write(0x00, IT8671F_CONFIG_REG_SWSUSP, (1 << 6));
- it8671f_exit_conf();
-}
-
-/* Enable the serial port(s). */
-void it8671f_enable_serial(pnp_devfn_t dev, u16 iobase)
-{
- it8671f_enter_conf();
-
- /*
- * Allow all devices to be enabled. Bits: FDC (0), Com1 (1), Com2 (2),
- * PP (3), Reserved (4), KBCK (5), KBCM (6), Reserved (7).
- */
- it8671f_sio_write(0x00, IT8671F_CONFIG_REG_LDE, 0x6f);
-
- /* Enable serial port(s). */
- it8671f_sio_write(IT8671F_SP1, 0x30, 0x01); /* Serial port 1 */
- it8671f_sio_write(IT8671F_SP2, 0x30, 0x01); /* Serial port 2 */
-
- it8671f_exit_conf();
-}
diff --git a/src/superio/ite/it8671f/it8671f.h b/src/superio/ite/it8671f/it8671f.h
deleted file mode 100644
index 5fe74bc..0000000
--- a/src/superio/ite/it8671f/it8671f.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_ITE_IT8671F_H
-#define SUPERIO_ITE_IT8671F_H
-
-#include <device/pnp_type.h>
-#include <stdint.h>
-
-/* Datasheet: Not available online, got it from ITE per request. */
-
-#define IT8671F_FDC 0x00 /* Floppy */
-#define IT8671F_SP1 0x01 /* Com1 */
-#define IT8671F_SP2 0x02 /* Com2 */
-#define IT8671F_PP 0x03 /* Parallel port */
-#define IT8671F_KBCK 0x05 /* PS/2 keyboard */
-#define IT8671F_KBCM 0x06 /* PS/2 mouse */
-
-void it8671f_48mhz_clkin(void);
-void it8671f_enable_serial(pnp_devfn_t dev, u16 iobase);
-
-#endif /* SUPERIO_ITE_IT8671F_H */
diff --git a/src/superio/ite/it8671f/superio.c b/src/superio/ite/it8671f/superio.c
deleted file mode 100644
index 70da2ab..0000000
--- a/src/superio/ite/it8671f/superio.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-#include <superio/conf_mode.h>
-#include "it8671f.h"
-
-static void init(struct device *dev)
-{
-
- if (!dev->enabled)
- return;
-
- switch (dev->path.pnp.device) {
- case IT8671F_FDC: /* TODO. */
- break;
- case IT8671F_PP: /* TODO. */
- break;
- case IT8671F_KBCK:
- pc_keyboard_init(NO_AUX_DEVICE);
- break;
- case IT8671F_KBCM: /* TODO. */
- break;
- }
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_enable,
- .init = init,
- .ops_pnp_mode = &pnp_conf_mode_870155_aa,
-};
-
-/* TODO: FDC, PP, KBCM. */
-static struct pnp_info pnp_dev_info[] = {
- { NULL, IT8671F_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, IT8671F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1,
- 0x07f8, },
- { NULL, IT8671F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07f8, 0x07f8, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_ite_it8671f_ops = {
- CHIP_NAME("ITE IT8671F Super I/O")
- .enable_dev = enable_dev,
-};
diff --git a/src/superio/ite/it8716f/Kconfig b/src/superio/ite/it8716f/Kconfig
deleted file mode 100644
index 969e788..0000000
--- a/src/superio/ite/it8716f/Kconfig
+++ /dev/null
@@ -1,25 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_ITE_IT8716F
- bool
- select SUPERIO_ITE_COMMON_PRE_RAM
-
-config SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL
- bool
- depends on SUPERIO_ITE_IT8716F
- default n
- select SUPERIO_ITE_COMMON_PRE_RAM
diff --git a/src/superio/ite/it8716f/Makefile.inc b/src/superio/ite/it8716f/Makefile.inc
deleted file mode 100644
index 6125068..0000000
--- a/src/superio/ite/it8716f/Makefile.inc
+++ /dev/null
@@ -1,17 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-ramstage-$(CONFIG_SUPERIO_ITE_IT8716F) += superio.c
diff --git a/src/superio/ite/it8716f/it8716f.h b/src/superio/ite/it8716f/it8716f.h
deleted file mode 100644
index 726c4cc..0000000
--- a/src/superio/ite/it8716f/it8716f.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_ITE_IT8716F_H
-#define SUPERIO_ITE_IT8716F_H
-
-#include <stdint.h>
-
-/* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8716_2.asp */
-
-/* Logical device numbers (LDNs). */
-#define IT8716F_FDC 0x00 /* Floppy */
-#define IT8716F_SP1 0x01 /* Com1 */
-#define IT8716F_SP2 0x02 /* Com2 */
-#define IT8716F_PP 0x03 /* Parallel port */
-#define IT8716F_EC 0x04 /* Environment controller */
-#define IT8716F_KBCK 0x05 /* PS/2 keyboard */
-#define IT8716F_KBCM 0x06 /* PS/2 mouse */
-#define IT8716F_GPIO 0x07 /* GPIO */
-#define IT8716F_MIDI 0x08 /* MIDI port */
-#define IT8716F_GAME 0x09 /* GAME port */
-#define IT8716F_IR 0x0a /* Consumer IR */
-
-/* Provided by mainboard, called by IT8716F superio.c. */
-void init_ec(u16 base);
-
-#endif /* SUPERIO_ITE_IT8716F_H */
diff --git a/src/superio/ite/it8716f/superio.c b/src/superio/ite/it8716f/superio.c
deleted file mode 100644
index de1ef0d..0000000
--- a/src/superio/ite/it8716f/superio.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
- * Copyright (C) 2007 AMD
- * (Written by Yinghai Lu <yinghai.lu@amd.com> for AMD)
- * Copyright (C) 2007 Ward Vandewege <ward@gnu.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <console/console.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-#include <superio/conf_mode.h>
-
-#include "it8716f.h"
-
-#if !CONFIG(SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL)
-
-void init_ec(u16 base)
-{
- u8 value;
-
- /* Read out current value of FAN_CTL (0x14). */
- value = pnp_read_index(base, 0x14);
- printk(BIOS_DEBUG, "FAN_CTL: reg = 0x%04x, read value = 0x%02x\n",
- base + 0x14, value);
-
- /* Set FAN_CTL (0x14) polarity to high, activate fans 1, 2 and 3. */
- pnp_write_index(base, 0x14, value | 0x87);
- printk(BIOS_DEBUG, "FAN_CTL: reg = 0x%04x, writing value = 0x%02x\n",
- base + 0x14, value | 0x87);
-}
-#endif
-
-static void it8716f_init(struct device *dev)
-{
- struct resource *res0;
-
- if (!dev->enabled)
- return;
-
- /* TODO: FDC, PP, KBCM, MIDI, GAME, IR. */
- switch (dev->path.pnp.device) {
- case IT8716F_EC:
- res0 = find_resource(dev, PNP_IDX_IO0);
-#define EC_INDEX_PORT 5
- init_ec(res0->base + EC_INDEX_PORT);
- break;
- case IT8716F_KBCK:
- pc_keyboard_init(NO_AUX_DEVICE);
- break;
- }
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_alt_enable,
- .init = it8716f_init,
- .ops_pnp_mode = &pnp_conf_mode_870155_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- { NULL, IT8716F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x0ff8, },
- { NULL, IT8716F_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
- { NULL, IT8716F_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
- { NULL, IT8716F_PP, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_DRQ0,
- 0x0ff8, 0x0ffc, },
- { NULL, IT8716F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x0ff8, 0x0ff8, },
- { NULL, IT8716F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x0fff, 0x0fff, },
- { NULL, IT8716F_KBCM, PNP_IRQ0, },
- { NULL, IT8716F_GPIO, PNP_IO0 | PNP_IO1 | PNP_IO2,
- 0x0ff8, 0x0ff8, 0x0ff8, },
- { NULL, IT8716F_MIDI, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
- { NULL, IT8716F_GAME, PNP_IO0, 0x0ff8, },
- { NULL, IT8716F_IR, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_ite_it8716f_ops = {
- CHIP_NAME("ITE IT8716F Super I/O")
- .enable_dev = enable_dev,
-};
diff --git a/src/superio/nsc/pc87309/Kconfig b/src/superio/nsc/pc87309/Kconfig
deleted file mode 100644
index ff72706..0000000
--- a/src/superio/nsc/pc87309/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_NSC_PC87309
- bool
- select SUPERIO_NSC_COMMON_PRE_RAM
diff --git a/src/superio/nsc/pc87309/Makefile.inc b/src/superio/nsc/pc87309/Makefile.inc
deleted file mode 100644
index 6c7a8ab..0000000
--- a/src/superio/nsc/pc87309/Makefile.inc
+++ /dev/null
@@ -1,17 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-ramstage-$(CONFIG_SUPERIO_NSC_PC87309) += superio.c
diff --git a/src/superio/nsc/pc87309/pc87309.h b/src/superio/nsc/pc87309/pc87309.h
deleted file mode 100644
index 3b912ea..0000000
--- a/src/superio/nsc/pc87309/pc87309.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_NSC_PC87309_H
-#define SUPERIO_NSC_PC87309_H
-
-/* Datasheet: PC87309 SuperI/O Plug and Play Compatible Chip. */
-
-#define PC87309_FDC 0x00 /* Floppy */
-#define PC87309_PP 0x01 /* Parallel port */
-#define PC87309_SP2 0x02 /* Com2 / IR */
-#define PC87309_SP1 0x03 /* Com1 */
-#define PC87309_PM 0x04 /* Power management */
-#define PC87309_KBCM 0x05 /* Mouse */
-#define PC87309_KBCK 0x06 /* Keyboard */
-
-#endif /* SUPERIO_NSC_PC87309_H */
diff --git a/src/superio/nsc/pc87309/superio.c b/src/superio/nsc/pc87309/superio.c
deleted file mode 100644
index 4f8f967..0000000
--- a/src/superio/nsc/pc87309/superio.c
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-#include "pc87309.h"
-
-static void init(struct device *dev)
-{
-
- if (!dev->enabled)
- return;
-
- switch (dev->path.pnp.device) {
- case PC87309_KBCK:
- pc_keyboard_init(NO_AUX_DEVICE);
- break;
- }
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_enable,
- .init = init,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- { NULL, PC87309_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, PC87309_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, PC87309_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1,
- 0x07f8, },
- { NULL, PC87309_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- /* TODO: PM. */
- { NULL, PC87309_KBCM, PNP_IRQ0, },
- { NULL, PC87309_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07f8, 0x7f8, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_nsc_pc87309_ops = {
- CHIP_NAME("NSC PC87309 Super I/O")
- .enable_dev = enable_dev,
-};
diff --git a/src/superio/nsc/pc87360/Kconfig b/src/superio/nsc/pc87360/Kconfig
deleted file mode 100644
index b70b935..0000000
--- a/src/superio/nsc/pc87360/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_NSC_PC87360
- bool
- select SUPERIO_NSC_COMMON_PRE_RAM
diff --git a/src/superio/nsc/pc87360/Makefile.inc b/src/superio/nsc/pc87360/Makefile.inc
deleted file mode 100644
index 81e2d3d..0000000
--- a/src/superio/nsc/pc87360/Makefile.inc
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2000 AG Electronics Ltd.
-## Copyright (C) 2003-2004 Linux Networx
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-ramstage-$(CONFIG_SUPERIO_NSC_PC87360) += superio.c
diff --git a/src/superio/nsc/pc87360/pc87360.h b/src/superio/nsc/pc87360/pc87360.h
deleted file mode 100644
index c969746..0000000
--- a/src/superio/nsc/pc87360/pc87360.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_NSC_PC87360_H
-#define SUPERIO_NSC_PC87360_H
-
-#define PC87360_FDC 0x00 /* Floppy */
-#define PC87360_PP 0x01 /* Parallel port */
-#define PC87360_SP2 0x02 /* Com2 */
-#define PC87360_SP1 0x03 /* Com1 */
-#define PC87360_SWC 0x04
-#define PC87360_KBCM 0x05 /* Mouse */
-#define PC87360_KBCK 0x06 /* Keyboard */
-#define PC87360_GPIO 0x07
-#define PC87360_ACB 0x08
-#define PC87360_FSCM 0x09
-#define PC87360_WDT 0x0A
-
-#endif /* SUPERIO_NSC_PC87360_H */
diff --git a/src/superio/nsc/pc87360/superio.c b/src/superio/nsc/pc87360/superio.c
deleted file mode 100644
index 33f27e1..0000000
--- a/src/superio/nsc/pc87360/superio.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-#include "pc87360.h"
-
-static void init(struct device *dev)
-{
- if (!dev->enabled)
- return;
-
- switch (dev->path.pnp.device) {
- case PC87360_KBCK:
- pc_keyboard_init(NO_AUX_DEVICE);
- break;
- }
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_enable,
- .init = init,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- { NULL, PC87360_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, PC87360_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, PC87360_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1,
- 0x07f8, },
- { NULL, PC87360_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, PC87360_SWC, PNP_IO0 | PNP_IRQ0, 0xfff0, },
- { NULL, PC87360_KBCM, PNP_IRQ0, },
- { NULL, PC87360_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07f8, 0x07f8, },
- { NULL, PC87360_GPIO, PNP_IO0 | PNP_IRQ0, 0xfff8, },
- { NULL, PC87360_ACB, PNP_IO0 | PNP_IRQ0, 0xfff8, },
- { NULL, PC87360_FSCM, PNP_IO0 | PNP_IRQ0, 0xfff8, },
- { NULL, PC87360_WDT, PNP_IO0 | PNP_IRQ0, 0xfffc, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_nsc_pc87360_ops = {
- CHIP_NAME("NSC PC87360 Super I/O")
- .enable_dev = enable_dev,
-};
diff --git a/src/superio/nsc/pc87366/Kconfig b/src/superio/nsc/pc87366/Kconfig
deleted file mode 100644
index bf17117..0000000
--- a/src/superio/nsc/pc87366/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_NSC_PC87366
- bool
- select SUPERIO_NSC_COMMON_PRE_RAM
diff --git a/src/superio/nsc/pc87366/Makefile.inc b/src/superio/nsc/pc87366/Makefile.inc
deleted file mode 100644
index f432530..0000000
--- a/src/superio/nsc/pc87366/Makefile.inc
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2000 AG Electronics Ltd.
-## Copyright (C) 2003-2004 Linux Networx
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-ramstage-$(CONFIG_SUPERIO_NSC_PC87366) += superio.c
diff --git a/src/superio/nsc/pc87366/pc87366.h b/src/superio/nsc/pc87366/pc87366.h
deleted file mode 100644
index b1df69f..0000000
--- a/src/superio/nsc/pc87366/pc87366.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_NSC_PC87366_H
-#define SUPERIO_NSC_PC87366_H
-
-#define PC87366_FDC 0x00 /* Floppy */
-#define PC87366_PP 0x01 /* Parallel port */
-#define PC87366_SP2 0x02 /* Com2 */
-#define PC87366_SP1 0x03 /* Com1 */
-#define PC87366_SWC 0x04
-#define PC87366_KBCM 0x05 /* Mouse */
-#define PC87366_KBCK 0x06 /* Keyboard */
-#define PC87366_GPIO 0x07
-#define PC87366_ACB 0x08
-#define PC87366_FSCM 0x09
-#define PC87366_WDT 0x0A
-#define PC87366_GMP 0x0b
-#define PC87366_MIDI 0x0C
-#define PC87366_VLM 0x0D
-#define PC87366_TMS 0x0E
-
-#endif /* SUPERIO_NSC_PC87366_H */
diff --git a/src/superio/nsc/pc87366/superio.c b/src/superio/nsc/pc87366/superio.c
deleted file mode 100644
index 6d8c66e..0000000
--- a/src/superio/nsc/pc87366/superio.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-#include "pc87366.h"
-
-static void init(struct device *dev)
-{
- if (!dev->enabled)
- return;
-
- switch (dev->path.pnp.device) {
- case PC87366_KBCK:
- pc_keyboard_init(NO_AUX_DEVICE);
- break;
- }
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_enable,
- .init = init,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- { NULL, PC87366_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, PC87366_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, PC87366_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1,
- 0x07f8, },
- { NULL, PC87366_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, PC87366_SWC, PNP_IO0 | PNP_IRQ0, 0xfff0, },
- { NULL, PC87366_KBCM, PNP_IRQ0, },
- { NULL, PC87366_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07f8, 0x07f8, },
- { NULL, PC87366_GPIO, PNP_IO0 | PNP_IRQ0, 0xfff8, },
- { NULL, PC87366_ACB, PNP_IO0 | PNP_IRQ0, 0xfff8, },
- { NULL, PC87366_FSCM, PNP_IO0 | PNP_IRQ0, 0xfff8, },
- { NULL, PC87366_WDT, PNP_IO0 | PNP_IRQ0, 0xfffc, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_nsc_pc87366_ops = {
- CHIP_NAME("NSC PC87366 Super I/O")
- .enable_dev = enable_dev,
-};
diff --git a/src/superio/nsc/pc97317/Kconfig b/src/superio/nsc/pc97317/Kconfig
deleted file mode 100644
index 38f6d34..0000000
--- a/src/superio/nsc/pc97317/Kconfig
+++ /dev/null
@@ -1,17 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_NSC_PC97317
- bool
diff --git a/src/superio/nsc/pc97317/Makefile.inc b/src/superio/nsc/pc97317/Makefile.inc
deleted file mode 100644
index 2f8ee76..0000000
--- a/src/superio/nsc/pc97317/Makefile.inc
+++ /dev/null
@@ -1,19 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2000 AG Electronics Ltd.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-bootblock-$(CONFIG_SUPERIO_NSC_PC97317) += early_serial.c
-romstage-$(CONFIG_SUPERIO_NSC_PC97317) += early_serial.c
-ramstage-$(CONFIG_SUPERIO_NSC_PC97317) += superio.c
diff --git a/src/superio/nsc/pc97317/early_serial.c b/src/superio/nsc/pc97317/early_serial.c
deleted file mode 100644
index 74489fa..0000000
--- a/src/superio/nsc/pc97317/early_serial.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include <device/pnp_ops.h>
-#include <device/pnp.h>
-#include <stdint.h>
-#include "pc97317.h"
-
-#define PM_DEV PNP_DEV(0x2e, PC97317_PM)
-#define PM_BASE 0xe8
-
-/* The PC97317 needs clocks to be set up before the serial port will operate. */
-void pc97317_enable_serial(pnp_devfn_t dev, u16 iobase)
-{
- /* Set base address of power management unit. */
- pnp_set_logical_device(PM_DEV);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, PM_BASE);
- pnp_set_enable(dev, 1);
-
- /* Use on-chip clock multiplier. */
- outb(0x03, PM_BASE);
- outb(inb(PM_BASE + 1) | 0x07, PM_BASE + 1);
-
- /* Wait for the clock to stabilise. */
- while(!(inb(PM_BASE + 1) & 0x80))
- ;
-
- /* Set the base address of the port. */
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
- pnp_set_enable(dev, 1);
-}
diff --git a/src/superio/nsc/pc97317/pc97317.h b/src/superio/nsc/pc97317/pc97317.h
deleted file mode 100644
index 76717fa..0000000
--- a/src/superio/nsc/pc97317/pc97317.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_NSC_PC97317_H
-#define SUPERIO_NSC_PC97317_H
-
-#define PC97317_KBCK 0x00 /* Keyboard */
-#define PC97317_KBCM 0x01 /* Mouse */
-#define PC97317_RTC 0x02 /* Real-Time Clock */
-#define PC97317_FDC 0x03 /* Floppy */
-#define PC97317_PP 0x04 /* Parallel port */
-#define PC97317_SP2 0x05 /* Com2 */
-#define PC97317_SP1 0x06 /* Com1 */
-#define PC97317_GPIO 0x07
-#define PC97317_PM 0x08 /* Power Management */
-
-#include <device/pnp_type.h>
-#include <stdint.h>
-
-void pc97317_enable_serial(pnp_devfn_t dev, u16 iobase);
-
-#endif /* SUPERIO_NSC_PC97317_H */
diff --git a/src/superio/nsc/pc97317/superio.c b/src/superio/nsc/pc97317/superio.c
deleted file mode 100644
index 42f5434..0000000
--- a/src/superio/nsc/pc97317/superio.c
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <stdlib.h>
-#include <pc80/keyboard.h>
-#include "pc97317.h"
-
-static void init(struct device *dev)
-{
- if (!dev->enabled)
- return;
-
- switch (dev->path.pnp.device) {
- case PC97317_KBCK:
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0); /* Disable keyboard */
- pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 MHz. */
- pnp_set_enable(dev, 1); /* Enable keyboard */
- pc_keyboard_init(NO_AUX_DEVICE);
- break;
- default:
- break;
- }
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_enable,
- .init = init,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- { NULL, PC97317_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x0fff, 0x0fff, },
- { NULL, PC97317_KBCM, PNP_IRQ0, },
- { NULL, PC97317_RTC, PNP_IO0 | PNP_IRQ0, 0xfffe, },
- { NULL, PC97317_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0xfff8, },
- { NULL, PC97317_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x03fc, },
- { NULL, PC97317_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1,
- 0xfff8, },
- { NULL, PC97317_SP1, PNP_IO0 | PNP_IRQ0, 0xfff8, },
- { NULL, PC97317_GPIO, PNP_IO0, 0xfff8, },
- { NULL, PC97317_PM, PNP_IO0, 0xfffe, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_nsc_pc97317_ops = {
- CHIP_NAME("NSC PC97317 Super I/O")
- .enable_dev = enable_dev,
-};
diff --git a/src/superio/smsc/dme1737/Kconfig b/src/superio/smsc/dme1737/Kconfig
deleted file mode 100644
index 20cb12c..0000000
--- a/src/superio/smsc/dme1737/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2012 Advanced Micro Devices, Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_SMSC_DME1737
- bool
diff --git a/src/superio/smsc/dme1737/Makefile.inc b/src/superio/smsc/dme1737/Makefile.inc
deleted file mode 100644
index e106a02..0000000
--- a/src/superio/smsc/dme1737/Makefile.inc
+++ /dev/null
@@ -1,21 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2000 AG Electronics Ltd.
-## Copyright (C) 2003-2004 Linux Networx
-## Copyright (C) 2004 Tyan
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-bootblock-$(CONFIG_SUPERIO_SMSC_DME1737) += early_serial.c
-romstage-$(CONFIG_SUPERIO_SMSC_DME1737) += early_serial.c
-ramstage-$(CONFIG_SUPERIO_SMSC_DME1737) += superio.c
diff --git a/src/superio/smsc/dme1737/dme1737.h b/src/superio/smsc/dme1737/dme1737.h
deleted file mode 100644
index f40cc35..0000000
--- a/src/superio/smsc/dme1737/dme1737.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_SMSC_DME1737_H
-#define SUPERIO_SMSC_DME1737_H
-
-#define DME1737_FDC 0 /* Floppy */
-#define DME1737_PP 3 /* Parallel Port */
-#define DME1737_SP1 4 /* Com1 */
-#define DME1737_SP2 5 /* Com2 */
-#define DME1737_KBC 7 /* Keyboard & Mouse */
-#define DME1737_RT 10 /* Runtime reg*/
-
-#include <device/pnp_type.h>
-#include <stdint.h>
-
-void dme1737_enable_serial(pnp_devfn_t dev, u16 iobase);
-
-#endif /* SUPERIO_SMSC_DME1737_H */
diff --git a/src/superio/smsc/dme1737/early_serial.c b/src/superio/smsc/dme1737/early_serial.c
deleted file mode 100644
index 58ad177..0000000
--- a/src/superio/smsc/dme1737/early_serial.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include <device/pnp_ops.h>
-#include <device/pnp.h>
-#include <stdint.h>
-#include "dme1737.h"
-
-static void pnp_enter_conf_state(pnp_devfn_t dev)
-{
- u16 port = dev >> 8;
- outb(0x55, port);
-}
-
-static void pnp_exit_conf_state(pnp_devfn_t dev)
-{
- u16 port = dev >> 8;
- outb(0xaa, port);
-}
-
-void dme1737_enable_serial(pnp_devfn_t dev, u16 iobase)
-{
- pnp_enter_conf_state(dev);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
- pnp_set_enable(dev, 1);
- pnp_exit_conf_state(dev);
-}
diff --git a/src/superio/smsc/dme1737/superio.c b/src/superio/smsc/dme1737/superio.c
deleted file mode 100644
index 0bfd3b8..0000000
--- a/src/superio/smsc/dme1737/superio.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <device/smbus.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-#include "dme1737.h"
-
-static void dme1737_init(struct device *dev)
-{
-
- if (!dev->enabled)
- return;
-
- switch (dev->path.pnp.device) {
- case DME1737_KBC:
- pc_keyboard_init(NO_AUX_DEVICE);
- break;
- }
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_alt_enable,
- .init = dme1737_init,
- .ops_pnp_mode = &pnp_conf_mode_55_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- { NULL, DME1737_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, DME1737_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, DME1737_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, DME1737_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, DME1737_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
- 0x07ff, 0x07ff, },
- { NULL, DME1737_RT, PNP_IO0, 0x0780, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_smsc_dme1737_ops = {
- CHIP_NAME("SMSC DME1737 Super I/O")
- .enable_dev = enable_dev,
-};
diff --git a/src/superio/smsc/lpc47b272/Kconfig b/src/superio/smsc/lpc47b272/Kconfig
deleted file mode 100644
index 07e6472..0000000
--- a/src/superio/smsc/lpc47b272/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2012 Advanced Micro Devices, Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_SMSC_LPC47B272
- bool
diff --git a/src/superio/smsc/lpc47b272/Makefile.inc b/src/superio/smsc/lpc47b272/Makefile.inc
deleted file mode 100644
index 51d77d4..0000000
--- a/src/superio/smsc/lpc47b272/Makefile.inc
+++ /dev/null
@@ -1,19 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2005 Digital Design Corporation
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-bootblock-$(CONFIG_SUPERIO_SMSC_LPC47B272) += early_serial.c
-romstage-$(CONFIG_SUPERIO_SMSC_LPC47B272) += early_serial.c
-ramstage-$(CONFIG_SUPERIO_SMSC_LPC47B272) += superio.c
diff --git a/src/superio/smsc/lpc47b272/early_serial.c b/src/superio/smsc/lpc47b272/early_serial.c
deleted file mode 100644
index 26fdfaf..0000000
--- a/src/superio/smsc/lpc47b272/early_serial.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2005 Digital Design Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* Pre-RAM driver for SMSC LPC47B272 Super I/O chip. */
-
-#include <arch/io.h>
-#include <device/pnp_ops.h>
-#include <device/pnp.h>
-#include <stdint.h>
-#include "lpc47b272.h"
-
-static void pnp_enter_conf_state(pnp_devfn_t dev)
-{
- u16 port = dev >> 8;
- outb(0x55, port);
-}
-
-static void pnp_exit_conf_state(pnp_devfn_t dev)
-{
- u16 port = dev >> 8;
- outb(0xaa, port);
-}
-
-/**
- * Configure the base I/O port of the specified serial device and enable the
- * serial device.
- *
- * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
- * @param iobase Processor I/O port address to assign to this serial device.
- */
-void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase)
-{
- pnp_enter_conf_state(dev);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
- pnp_set_enable(dev, 1);
- pnp_exit_conf_state(dev);
-}
diff --git a/src/superio/smsc/lpc47b272/lpc47b272.h b/src/superio/smsc/lpc47b272/lpc47b272.h
deleted file mode 100644
index 3fbd043..0000000
--- a/src/superio/smsc/lpc47b272/lpc47b272.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2005 Digital Design Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_SMSC_LPC47B272_H
-#define SUPERIO_SMSC_LPC47B272_H
-
-#define LPC47B272_FDC 0 /* Floppy */
-#define LPC47B272_PP 3 /* Parallel Port */
-#define LPC47B272_SP1 4 /* Com1 */
-#define LPC47B272_SP2 5 /* Com2 */
-#define LPC47B272_KBC 7 /* Keyboard & Mouse */
-#define LPC47B272_RT 10 /* Runtime reg*/
-
-#define LPC47B272_MAX_CONFIG_REGISTER 0x5F
-
-#include <device/pnp_type.h>
-#include <stdint.h>
-
-void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase);
-
-#endif /* SUPERIO_SMSC_LPC47B272_H */
diff --git a/src/superio/smsc/lpc47b272/superio.c b/src/superio/smsc/lpc47b272/superio.c
deleted file mode 100644
index 6ac2d6d..0000000
--- a/src/superio/smsc/lpc47b272/superio.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- * Copyright (C) 2005 Digital Design Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* RAM driver for SMSC LPC47B272 Super I/O chip. */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <device/smbus.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-#include "lpc47b272.h"
-
-/**
- * Initialize the specified Super I/O device.
- *
- * Devices other than COM ports and the keyboard controller are ignored.
- * For COM ports, we configure the baud rate.
- *
- * @param dev Pointer to structure describing a Super I/O device.
- */
-static void lpc47b272_init(struct device *dev)
-{
-
- if (!dev->enabled)
- return;
-
- switch (dev->path.pnp.device) {
- case LPC47B272_KBC:
- pc_keyboard_init(NO_AUX_DEVICE);
- break;
- }
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_alt_enable,
- .init = lpc47b272_init,
- .ops_pnp_mode = &pnp_conf_mode_55_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- { NULL, LPC47B272_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, LPC47B272_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, LPC47B272_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, LPC47B272_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, LPC47B272_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
- 0x07ff, 0x07ff, },
- { NULL, LPC47B272_RT, PNP_IO0, 0x0780, },
-};
-
-/**
- * Create device structures and allocate resources to devices specified in the
- * pnp_dev_info array (above).
- *
- * @param dev Pointer to structure describing a Super I/O device.
- */
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_smsc_lpc47b272_ops = {
- CHIP_NAME("SMSC LPC47B272 Super I/O")
- .enable_dev = enable_dev
-};
diff --git a/src/superio/smsc/lpc47b397/Kconfig b/src/superio/smsc/lpc47b397/Kconfig
deleted file mode 100644
index 80264c4..0000000
--- a/src/superio/smsc/lpc47b397/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2012 Advanced Micro Devices, Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_SMSC_LPC47B397
- bool
diff --git a/src/superio/smsc/lpc47b397/Makefile.inc b/src/superio/smsc/lpc47b397/Makefile.inc
deleted file mode 100644
index ddb251d..0000000
--- a/src/superio/smsc/lpc47b397/Makefile.inc
+++ /dev/null
@@ -1,21 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2000 AG Electronics Ltd.
-## Copyright (C) 2003-2004 Linux Networx
-## Copyright (C) 2004 Tyan
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-bootblock-$(CONFIG_SUPERIO_SMSC_LPC47B397) += early_serial.c
-romstage-$(CONFIG_SUPERIO_SMSC_LPC47B397) += early_serial.c
-ramstage-$(CONFIG_SUPERIO_SMSC_LPC47B397) += superio.c
diff --git a/src/superio/smsc/lpc47b397/early_serial.c b/src/superio/smsc/lpc47b397/early_serial.c
deleted file mode 100644
index a07cd99..0000000
--- a/src/superio/smsc/lpc47b397/early_serial.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include <device/pnp_ops.h>
-#include <device/pnp.h>
-#include <stdint.h>
-#include "lpc47b397.h"
-
-static void pnp_enter_conf_state(pnp_devfn_t dev)
-{
- u16 port = dev >> 8;
- outb(0x55, port);
-}
-
-static void pnp_exit_conf_state(pnp_devfn_t dev)
-{
- u16 port = dev >> 8;
- outb(0xaa, port);
-}
-
-void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase)
-{
- pnp_enter_conf_state(dev);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
- pnp_set_enable(dev, 1);
- pnp_exit_conf_state(dev);
-}
diff --git a/src/superio/smsc/lpc47b397/lpc47b397.h b/src/superio/smsc/lpc47b397/lpc47b397.h
deleted file mode 100644
index 5f3a504..0000000
--- a/src/superio/smsc/lpc47b397/lpc47b397.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_SMSC_LPC47B397_H
-#define SUPERIO_SMSC_LPC47B397_H
-
-#define LPC47B397_FDC 0 /* Floppy */
-#define LPC47B397_PP 3 /* Parallel Port */
-#define LPC47B397_SP1 4 /* Com1 */
-#define LPC47B397_SP2 5 /* Com2 */
-#define LPC47B397_KBC 7 /* Keyboard & Mouse */
-#define LPC47B397_HWM 8 /* HW Monitor */
-#define LPC47B397_RT 10 /* Runtime reg*/
-
-#include <device/pnp_type.h>
-#include <stdint.h>
-
-void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase);
-
-#endif /* SUPERIO_SMSC_LPC47B397_H */
diff --git a/src/superio/smsc/lpc47b397/superio.c b/src/superio/smsc/lpc47b397/superio.c
deleted file mode 100644
index 4b9e345..0000000
--- a/src/superio/smsc/lpc47b397/superio.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <console/console.h>
-#include <device/smbus.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-#include "lpc47b397.h"
-
-static void enable_hwm_smbus(struct device *dev)
-{
- /* Enable SensorBus register access. */
- u8 reg8;
-
- reg8 = pnp_read_config(dev, 0xf0);
- reg8 |= (1 << 1);
- pnp_write_config(dev, 0xf0, reg8);
-}
-
-static void lpc47b397_init(struct device *dev)
-{
-
- if (!dev->enabled)
- return;
-
- switch (dev->path.pnp.device) {
- case LPC47B397_KBC:
- pc_keyboard_init(NO_AUX_DEVICE);
- break;
- }
-}
-
-static void lpc47b397_pnp_enable_resources(struct device *dev)
-{
- pnp_enable_resources(dev);
-
- pnp_enter_conf_mode(dev);
- switch (dev->path.pnp.device) {
- case LPC47B397_HWM:
- printk(BIOS_DEBUG, "LPC47B397 SensorBus register access enabled\n");
- pnp_set_logical_device(dev);
- enable_hwm_smbus(dev);
- break;
- }
- /* dump_pnp_device(dev); */
- pnp_exit_conf_mode(dev);
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = lpc47b397_pnp_enable_resources,
- .enable = pnp_alt_enable,
- .init = lpc47b397_init,
- .ops_pnp_mode = &pnp_conf_mode_55_aa,
-};
-
-#define HWM_INDEX 0
-#define HWM_DATA 1
-#define SB_INDEX 0x0b
-#define SB_DATA0 0x0c
-#define SB_DATA1 0x0d
-#define SB_DATA2 0x0e
-#define SB_DATA3 0x0f
-
-static int lsmbus_read_byte(struct device *dev, u8 address)
-{
- unsigned int device;
- struct resource *res;
- int result;
-
- device = dev->path.i2c.device;
-
- res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0);
-
- pnp_write_index(res->base + HWM_INDEX, 0, device); /* Why 0? */
-
- /* We only read it one byte one time. */
- result = pnp_read_index(res->base + SB_INDEX, address);
-
- return result;
-}
-
-static int lsmbus_write_byte(struct device *dev, u8 address, u8 val)
-{
- unsigned int device;
- struct resource *res;
-
- device = dev->path.i2c.device;
- res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0);
-
- pnp_write_index(res->base+HWM_INDEX, 0, device); /* Why 0? */
-
- /* We only write it one byte one time. */
- pnp_write_index(res->base+SB_INDEX, address, val);
-
- return 0;
-}
-
-static struct smbus_bus_operations lops_smbus_bus = {
- /* .recv_byte = lsmbus_recv_byte, */
- /* .send_byte = lsmbus_send_byte, */
- .read_byte = lsmbus_read_byte,
- .write_byte = lsmbus_write_byte,
-};
-
-static struct device_operations ops_hwm = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = lpc47b397_pnp_enable_resources,
- .enable = pnp_alt_enable,
- .init = lpc47b397_init,
- .ops_smbus_bus = &lops_smbus_bus,
- .ops_pnp_mode = &pnp_conf_mode_55_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- { NULL, LPC47B397_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, LPC47B397_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, LPC47B397_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, LPC47B397_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, LPC47B397_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
- 0x07ff, 0x07ff, },
- { &ops_hwm, LPC47B397_HWM, PNP_IO0, 0x07f0, },
- { NULL, LPC47B397_RT, PNP_IO0, 0x0780, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_smsc_lpc47b397_ops = {
- CHIP_NAME("SMSC LPC47B397 Super I/O")
- .enable_dev = enable_dev,
-};
diff --git a/src/superio/smsc/sch4037/Kconfig b/src/superio/smsc/sch4037/Kconfig
deleted file mode 100644
index ce87f75..0000000
--- a/src/superio/smsc/sch4037/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2012 Advanced Micro Devices, Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_SMSC_SCH4037
- bool
diff --git a/src/superio/smsc/sch4037/Makefile.inc b/src/superio/smsc/sch4037/Makefile.inc
deleted file mode 100644
index ac7d7de..0000000
--- a/src/superio/smsc/sch4037/Makefile.inc
+++ /dev/null
@@ -1,18 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# Copyright (C) 2012 Advanced Micro Devices, Inc.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; version 2 of the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-
-bootblock-$(CONFIG_SUPERIO_SMSC_SCH4037) += sch4037_early_init.c
-romstage-$(CONFIG_SUPERIO_SMSC_SCH4037) += sch4037_early_init.c
-ramstage-$(CONFIG_SUPERIO_SMSC_SCH4037) += superio.c
diff --git a/src/superio/smsc/sch4037/sch4037.h b/src/superio/smsc/sch4037/sch4037.h
deleted file mode 100644
index f0fa3cd..0000000
--- a/src/superio/smsc/sch4037/sch4037.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_SCH_4037_H
-#define SUPERIO_SCH_4037_H
-
-#define SCH4037_FDD 0 /* FDD */
-#define SCH4037_LPT 3 /* LPT */
-#define SMSCSUPERIO_SP1 4 /* Com1 */
-#define SMSCSUPERIO_SP2 5 /* Com2 */
-#define SCH4037_RTC 6 /* RTC */
-#define SCH4037_KBC 7 /* KBC */
-#define SCH4037_HWM 8 /* HWM */
-#define SCH4037_RUNTIME 0x0A /* Runtime */
-#define SCH4037_XBUS 0x0B /* X-BUS */
-
-void sch4037_early_init(unsigned port);
-
-#endif /* SUPERIO_SCH_4037_H */
diff --git a/src/superio/smsc/sch4037/sch4037_early_init.c b/src/superio/smsc/sch4037/sch4037_early_init.c
deleted file mode 100644
index a416ab8..0000000
--- a/src/superio/smsc/sch4037/sch4037_early_init.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-
-#include <arch/io.h>
-#include <device/pnp_ops.h>
-#include <device/pnp.h>
-#include <stdint.h>
-
-#include "sch4037.h"
-
-static void pnp_enter_conf_state(pnp_devfn_t dev)
-{
- unsigned port = dev >> 8;
- outb(0x55, port);
-}
-
-static void pnp_exit_conf_state(pnp_devfn_t dev)
-{
- unsigned port = dev >> 8;
- outb(0xaa, port);
-}
-
-void sch4037_early_init(unsigned port)
-{
- pnp_devfn_t dev;
-
- dev = PNP_DEV(port, SMSCSUPERIO_SP1);
- pnp_enter_conf_state(dev);
-
- /* Auto power management */
- pnp_write_config(dev, 0x22, 0x38); /* BIT3+BIT4+BIT5 */
- pnp_write_config(dev, 0x23, 0);
-
- /* Enable SMSC UART 0 */
- dev = PNP_DEV(port, SMSCSUPERIO_SP1);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
-
- pnp_set_iobase(dev, PNP_IDX_IO0, CONFIG_TTYS0_BASE);
- pnp_set_irq(dev, PNP_IDX_IRQ0, 0x4);
-
- /* Enabled High speed, disabled MIDI support. */
- pnp_write_config(dev, 0xF0, 0x02);
- pnp_set_enable(dev, 1);
-
- /* Enable keyboard */
- dev = PNP_DEV(port, SCH4037_KBC);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_irq(dev, 0x70, 1); /* IRQ 1 */
- pnp_set_irq(dev, 0x72, 12); /* IRQ 12 */
- pnp_set_enable(dev, 1);
-
- pnp_exit_conf_state(dev);
-}
diff --git a/src/superio/smsc/sch4037/superio.c b/src/superio/smsc/sch4037/superio.c
deleted file mode 100644
index 5e49aa7..0000000
--- a/src/superio/smsc/sch4037/superio.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* RAM driver for the SMSC KBC1100 Super I/O chip */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-
-#include "sch4037.h"
-
-static void sch4037_init(struct device *dev)
-{
- if (!dev->enabled) {
- return;
- }
-
- switch (dev->path.pnp.device) {
- case SCH4037_KBC:
- pc_keyboard_init(NO_AUX_DEVICE);
- break;
- }
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_alt_enable,
- .init = sch4037_init,
- .ops_pnp_mode = &pnp_conf_mode_55_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- { NULL, SCH4037_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
- 0x7ff, 0x7ff, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_smsc_sch4037_ops = {
- CHIP_NAME("SMSC SCH4037 Super I/O")
- .enable_dev = enable_dev,
-};
diff --git a/src/superio/smsc/sio1036/Kconfig b/src/superio/smsc/sio1036/Kconfig
deleted file mode 100644
index df519de..0000000
--- a/src/superio/smsc/sio1036/Kconfig
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2012 Advanced Micro Devices, Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_SMSC_SIO1036
- bool
diff --git a/src/superio/smsc/sio1036/Makefile.inc b/src/superio/smsc/sio1036/Makefile.inc
deleted file mode 100644
index e9fdae2..0000000
--- a/src/superio/smsc/sio1036/Makefile.inc
+++ /dev/null
@@ -1,18 +0,0 @@
-#
-# This file is part of the coreboot project.
-#
-# Copyright (C) 2012 Advanced Micro Devices, Inc.
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; version 2 of the License.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-
-bootblock-$(CONFIG_SUPERIO_SMSC_SIO1036) += sio1036_early_init.c
-romstage-$(CONFIG_SUPERIO_SMSC_SIO1036) += sio1036_early_init.c
-ramstage-$(CONFIG_SUPERIO_SMSC_SIO1036) += superio.c
diff --git a/src/superio/smsc/sio1036/sio1036.h b/src/superio/smsc/sio1036/sio1036.h
deleted file mode 100644
index 610beba..0000000
--- a/src/superio/smsc/sio1036/sio1036.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_SMSC_SIO1306_H
-#define SUPERIO_SMSC_SIO1306_H
-
-#define SIO1036_SP1 0 /* Com1 */
-
-#define UART_POWER_DOWN (1 << 7)
-#define LPT_POWER_DOWN (1 << 2)
-#define IR_OUTPUT_MUX (1 << 6)
-
-#include <device/pnp_type.h>
-#include <stdint.h>
-
-void sio1036_enable_serial(pnp_devfn_t dev, u16 iobase);
-
-#endif /* SUPERIO_SMSC_SIO1306_H */
diff --git a/src/superio/smsc/sio1036/sio1036_early_init.c b/src/superio/smsc/sio1036/sio1036_early_init.c
deleted file mode 100644
index 47f317f..0000000
--- a/src/superio/smsc/sio1036/sio1036_early_init.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* Pre-RAM driver for the SMSC KBC1100 Super I/O chip */
-
-#include <arch/io.h>
-#include <device/pnp_ops.h>
-#include <stdint.h>
-
-#include "sio1036.h"
-
-static inline void sio1036_enter_conf_state(pnp_devfn_t dev)
-{
- unsigned port = dev >> 8;
- outb(0x55, port);
-}
-
-static inline void sio1036_exit_conf_state(pnp_devfn_t dev)
-{
- unsigned port = dev >> 8;
- outb(0xaa, port);
-}
-
-/* Detect SMSC SIO1036 LPC Debug Card status */
-static u8 detect_sio1036_chip(unsigned port)
-{
- pnp_devfn_t dev = PNP_DEV(port, SIO1036_SP1);
- unsigned data;
-
- sio1036_enter_conf_state(dev);
- data = pnp_read_config(dev, 0x0D);
- sio1036_exit_conf_state(dev);
-
- /* Detect SMSC SIO1036 chip */
- if (data == 0x82) {
- /* Found SMSC SIO1036 chip */
- return 0;
- }
- else {
- return 1;
- };
-}
-
-void sio1036_enable_serial(pnp_devfn_t dev, u16 iobase)
-{
- unsigned port = dev >> 8;
-
- if (detect_sio1036_chip(port) != 0)
- return;
-
- sio1036_enter_conf_state(dev);
-
- /* Enable SMSC UART 0 */
- /* Valid configuration cycle */
- pnp_write_config(dev, 0x00, 0x28);
-
- /* PP power/mode/cr lock */
- pnp_write_config(dev, 0x01, 0x98 | LPT_POWER_DOWN);
- pnp_write_config(dev, 0x02, 0x08 | UART_POWER_DOWN);
-
- /*Auto power management*/
- pnp_write_config(dev, 0x07, 0x00);
-
- /*ECP FIFO threhod */
- pnp_write_config(dev, 0x0A, 0x00 | IR_OUTPUT_MUX);
-
- /*GPIO direction register 2 */
- pnp_write_config(dev, 0x033, 0x00);
-
- /*UART Mode */
- pnp_write_config(dev, 0x0C, 0x02);
-
- /* GPIO polarity regisgter 2 */
- pnp_write_config(dev, 0x034, 0x00);
-
- /* Enable SMSC UART 0 */
- /*Set base io address */
- pnp_write_config(dev, 0x25, (u8)(iobase >> 2));
-
- /* Set UART IRQ onto 0x04 */
- pnp_write_config(dev, 0x28, 0x04);
-
- sio1036_exit_conf_state(dev);
-}
diff --git a/src/superio/smsc/sio1036/superio.c b/src/superio/smsc/sio1036/superio.c
deleted file mode 100644
index a192831..0000000
--- a/src/superio/smsc/sio1036/superio.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2012 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* RAM driver for the SMSC SIO1036 Super I/O chip */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <stdlib.h>
-
-#include "sio1036.h"
-
-static void sio1036_init(struct device *dev)
-{
- if (!dev->enabled) {
- return;
- }
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_alt_enable,
- .init = sio1036_init,
- .ops_pnp_mode = &pnp_conf_mode_55_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- { NULL, SIO1036_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_smsc_sio1036_ops = {
- CHIP_NAME("SMSC SIO1036 Super I/O")
- .enable_dev = enable_dev
-};
diff --git a/src/superio/via/vt1211/Kconfig b/src/superio/via/vt1211/Kconfig
deleted file mode 100644
index b2de1d3..0000000
--- a/src/superio/via/vt1211/Kconfig
+++ /dev/null
@@ -1,17 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_VIA_VT1211
- bool
diff --git a/src/superio/via/vt1211/Makefile.inc b/src/superio/via/vt1211/Makefile.inc
deleted file mode 100644
index d3044af..0000000
--- a/src/superio/via/vt1211/Makefile.inc
+++ /dev/null
@@ -1,17 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-ramstage-$(CONFIG_SUPERIO_VIA_VT1211) += superio.c
diff --git a/src/superio/via/vt1211/superio.c b/src/superio/via/vt1211/superio.c
deleted file mode 100644
index 4d7c8de..0000000
--- a/src/superio/via/vt1211/superio.c
+++ /dev/null
@@ -1,192 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include <console/console.h>
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <stdlib.h>
-#include "vt1211.h"
-
-static u8 hwm_io_regs[] = {
- 0x10,0x03, 0x11,0x10, 0x12,0x0d, 0x13,0x7f,
- 0x14,0x21, 0x15,0x81, 0x16,0xbd, 0x17,0x8a,
- 0x18,0x00, 0x19,0x00, 0x1a,0x00, 0x1b,0x00,
- 0x1d,0xff, 0x1e,0x00, 0x1f,0x73, 0x20,0x67,
- 0x21,0xc1, 0x22,0xca, 0x23,0x74, 0x24,0xc2,
- 0x25,0xc7, 0x26,0xc9, 0x27,0x7f, 0x29,0x00,
- 0x2a,0x00, 0x2b,0xff, 0x2c,0x00, 0x2d,0xff,
- 0x2e,0x00, 0x2f,0xff, 0x30,0x00, 0x31,0xff,
- 0x32,0x00, 0x33,0xff, 0x34,0x00, 0x39,0xff,
- 0x3a,0x00, 0x3b,0xff, 0x3c,0xff, 0x3d,0xff,
- 0x3e,0x00, 0x3f,0xb0, 0x43,0xff, 0x44,0xff,
- 0x46,0xff, 0x47,0x50, 0x4a,0x03, 0x4b,0xc0,
- 0x4c,0x00, 0x4d,0x00, 0x4e,0x0f, 0x5d,0x77,
- 0x5c,0x00, 0x5f,0x33, 0x40,0x01,
-};
-
-static void vt1211_set_iobase(struct device *dev, u8 index, u16 iobase)
-{
- switch (dev->path.pnp.device) {
- case VT1211_FDC:
- case VT1211_PP:
- case VT1211_SP1:
- case VT1211_SP2:
- pnp_write_config(dev, index + 0, (iobase >> 2) & 0xff);
- break;
- case VT1211_ROM:
- /* TODO: Error. VT1211_ROM doesn't have an I/O base. */
- break;
- case VT1211_MIDI:
- case VT1211_GAME:
- case VT1211_GPIO:
- case VT1211_WDG:
- case VT1211_WUC:
- case VT1211_HWM:
- case VT1211_FIR:
- default:
- pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff);
- pnp_write_config(dev, index + 1, iobase & 0xff);
- break;
- }
-}
-
-/* Initialize VT1211 hardware monitor registers, which are at 0xECXX. */
-static void init_hwm(u16 base)
-{
- int i;
-
- for (i = 0; i < sizeof(hwm_io_regs); i += 2)
- outb(hwm_io_regs[i + 1], base + hwm_io_regs[i]);
-}
-
-static void vt1211_init(struct device *dev)
-{
- struct resource *res0;
-
- if (!dev->enabled)
- return;
-
- switch (dev->path.pnp.device) {
- case VT1211_HWM:
- res0 = find_resource(dev, PNP_IDX_IO0);
- init_hwm(res0->base);
- break;
- case VT1211_FDC:
- case VT1211_PP:
- case VT1211_MIDI:
- case VT1211_GAME:
- case VT1211_GPIO:
- case VT1211_WDG:
- case VT1211_WUC:
- case VT1211_FIR:
- case VT1211_ROM:
- /* TODO: Any init needed for these LDNs? */
- break;
- default:
- printk(BIOS_INFO, "VT1211: Cannot init unknown device!\n");
- }
-}
-
-static void vt1211_pnp_enable_resources(struct device *dev)
-{
- printk(BIOS_DEBUG, "%s - enabling\n", dev_path(dev));
- pnp_enable_resources(dev);
-}
-
-static void vt1211_pnp_set_resources(struct device *dev)
-{
- struct resource *res;
-
-#if CONFIG(CONSOLE_SERIAL) && CONFIG(DRIVERS_UART_8250IO)
- /* TODO: Do the same for SP2? */
- if (dev->path.pnp.device == VT1211_SP1) {
- for (res = dev->resource_list; res; res = res->next) {
- res->flags |= IORESOURCE_STORED;
- report_resource_stored(dev, res, "");
- }
- return;
- }
-#endif
-
- pnp_enter_conf_mode(dev);
-
- pnp_set_logical_device(dev);
-
- /* Paranoia says I should disable the device here... */
- for (res = dev->resource_list; res; res = res->next) {
- if (!(res->flags & IORESOURCE_ASSIGNED)) {
- printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010Lx "
- "not assigned\n", dev_path(dev), res->index,
- resource_type(res), res->size);
- continue;
- }
-
- /* Now store the resource. */
- if (res->flags & IORESOURCE_IO) {
- vt1211_set_iobase(dev, res->index, res->base);
- } else if (res->flags & IORESOURCE_DRQ) {
- pnp_set_drq(dev, res->index, res->base);
- } else if (res->flags & IORESOURCE_IRQ) {
- pnp_set_irq(dev, res->index, res->base);
- } else {
- printk(BIOS_ERR, "ERROR: %s %02lx unknown resource "
- "type\n", dev_path(dev), res->index);
- return;
- }
- res->flags |= IORESOURCE_STORED;
-
- report_resource_stored(dev, res, "");
- }
-
- pnp_exit_conf_mode(dev);
-}
-
-struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = vt1211_pnp_set_resources,
- .enable_resources = vt1211_pnp_enable_resources,
- .enable = pnp_alt_enable,
- .init = vt1211_init,
- .ops_pnp_mode = &pnp_conf_mode_8787_aa,
-};
-
-/* TODO: Check if 0x07f8 is correct for FDC/PP/SP1/SP2, the rest is correct. */
-static struct pnp_info pnp_dev_info[] = {
- { NULL, VT1211_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, VT1211_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, VT1211_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, VT1211_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, VT1211_MIDI, PNP_IO0 | PNP_IRQ0, 0xfffc, },
- { NULL, VT1211_GAME, PNP_IO0, 0xfff8, },
- { NULL, VT1211_GPIO, PNP_IO0 | PNP_IRQ0, 0xfff0, },
- { NULL, VT1211_WDG, PNP_IO0 | PNP_IRQ0, 0xfff0, },
- { NULL, VT1211_WUC, PNP_IO0 | PNP_IRQ0, 0xfff0, },
- { NULL, VT1211_HWM, PNP_IO0 | PNP_IRQ0, 0xff00, },
- { NULL, VT1211_FIR, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0xff00, },
- { NULL, VT1211_ROM, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_via_vt1211_ops = {
- CHIP_NAME("VIA VT1211 Super I/O")
- .enable_dev = enable_dev,
-};
diff --git a/src/superio/via/vt1211/vt1211.h b/src/superio/via/vt1211/vt1211.h
deleted file mode 100644
index 9f0a1ef..0000000
--- a/src/superio/via/vt1211/vt1211.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_VIA_VT1211_VT1211_H
-#define SUPERIO_VIA_VT1211_VT1211_H
-
-/* Logical device numbers (LDNs). */
-#define VT1211_FDC 0x00 /* Floppy */
-#define VT1211_PP 0x01 /* Parallel port */
-#define VT1211_SP1 0x02 /* COM1 */
-#define VT1211_SP2 0x03 /* COM2 */
-#define VT1211_MIDI 0x06 /* MIDI */
-#define VT1211_GAME 0x07 /* Game port (GMP) */
-#define VT1211_GPIO 0x08 /* GPIO */
-#define VT1211_WDG 0x09 /* Watchdog timer (WDG) */
-#define VT1211_WUC 0x0a /* Wake-up control (WUC) */
-#define VT1211_HWM 0x0b /* Hardware monitor (HM) */
-#define VT1211_FIR 0x0c /* Very fast IR (VFIR/FIR) */
-#define VT1211_ROM 0x0d /* Flash ROM */
-
-#endif
diff --git a/src/superio/winbond/w83697hf/Kconfig b/src/superio/winbond/w83697hf/Kconfig
deleted file mode 100644
index 6ca03fe..0000000
--- a/src/superio/winbond/w83697hf/Kconfig
+++ /dev/null
@@ -1,19 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_WINBOND_W83697HF
- bool
- select SUPERIO_WINBOND_COMMON_PRE_RAM
diff --git a/src/superio/winbond/w83697hf/Makefile.inc b/src/superio/winbond/w83697hf/Makefile.inc
deleted file mode 100644
index d1ef2b0..0000000
--- a/src/superio/winbond/w83697hf/Makefile.inc
+++ /dev/null
@@ -1,17 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2008 Sean Nelson <snelson@nmt.edu>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-ramstage-$(CONFIG_SUPERIO_WINBOND_W83697HF) += superio.c
diff --git a/src/superio/winbond/w83697hf/chip.h b/src/superio/winbond/w83697hf/chip.h
deleted file mode 100644
index f7fc798..0000000
--- a/src/superio/winbond/w83697hf/chip.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Sean Nelson <snelson@nmt.edu>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_WINBOND_W83697HF_CHIP_H
-#define SUPERIO_WINBOND_W83697HF_CHIP_H
-
-
-struct superio_winbond_w83697hf_config {
- unsigned int hwmon_fan1_divisor;
- unsigned int hwmon_fan2_divisor;
-};
-
-#endif /* SUPERIO_WINBOND_W83697HF_CHIP_H */
diff --git a/src/superio/winbond/w83697hf/superio.c b/src/superio/winbond/w83697hf/superio.c
deleted file mode 100644
index a3c132c..0000000
--- a/src/superio/winbond/w83697hf/superio.c
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Sean Nelson <snelson@nmt.edu>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <console/console.h>
-#include <lib.h>
-#include <stdlib.h>
-#include "chip.h"
-#include "w83697hf.h"
-
-static void hwmon_set_fan_divisor(unsigned int base, int num, unsigned int divisor) {
- unsigned char enc, buf;
-
- if (divisor) {
- enc = log2(divisor);
- if (1 << enc != divisor || enc > 7)
- die("invalid fan divisor");
- outb(0x4e, base + 5);
- outb(0x00, base + 6);
- outb(0x47, base + 5);
- outb((inb(base + 6) & ~(0x30 << (num * 2))) | ((enc & 3) << (4 + num * 2)), base + 6);
- outb(0x5d, base + 5);
- buf = inb(base + 6);
- /* the above inb() auto-increments the address pointer ... */
- outb(0x5d, base + 5);
- outb((buf & ~(0x20 << num)) | ((enc & 4) << (3 + num)), base + 6);
- }
-}
-
-static void w83697hf_init(struct device *dev)
-{
- struct resource *res0;
- struct superio_winbond_w83697hf_config *cfg;
-
- if (!dev->enabled)
- return;
-
- cfg = dev->chip_info;
-
- switch (dev->path.pnp.device) {
- case W83697HF_HWM:
- if (cfg) {
- res0 = find_resource(dev, PNP_IDX_IO0);
- hwmon_set_fan_divisor(res0->base, 0, cfg->hwmon_fan1_divisor);
- hwmon_set_fan_divisor(res0->base, 1, cfg->hwmon_fan2_divisor);
- }
- break;
- }
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_alt_enable,
- .init = w83697hf_init,
- .ops_pnp_mode = &pnp_conf_mode_8787_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- { NULL, W83697HF_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, W83697HF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
- { NULL, W83697HF_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, W83697HF_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, W83697HF_CIR, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { NULL, W83697HF_GAME_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0,
- 0x07ff, 0x07fe, },
- { NULL, W83697HF_MIDI_GPIO5, },
- { NULL, W83697HF_GPIO234, },
- { NULL, W83697HF_ACPI, },
- { NULL, W83697HF_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_winbond_w83697hf_ops = {
- CHIP_NAME("Winbond W83697HF Super I/O")
- .enable_dev = enable_dev,
-};
diff --git a/src/superio/winbond/w83697hf/w83697hf.h b/src/superio/winbond/w83697hf/w83697hf.h
deleted file mode 100644
index 52466a8..0000000
--- a/src/superio/winbond/w83697hf/w83697hf.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Sean Nelson <snelson@nmt.edu>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_WINBOND_W83697HF_H
-#define SUPERIO_WINBOND_W83697HF_H
-
-#define W83697HF_FDC 0 /* Floppy */
-#define W83697HF_PP 1 /* Parallel port */
-#define W83697HF_SP1 2 /* Com1 */
-#define W83697HF_SP2 3 /* Com2 */
-#define W83697HF_CIR 6 /* Consumer IR */
-#define W83697HF_GAME_GPIO1 7 /* Game port, GPIO 1 */
-#define W83697HF_MIDI_GPIO5 8 /* MIDI, GPIO 5 */
-#define W83697HF_GPIO234 9 /* GPIO 2, 3, 4 */
-#define W83697HF_ACPI 10 /* ACPI */
-#define W83697HF_HWM 11 /* Hardware monitor */
-
-#endif /* SUPERIO_WINBOND_W83697HF_H */
diff --git a/src/superio/winbond/wpcd376i/Kconfig b/src/superio/winbond/wpcd376i/Kconfig
deleted file mode 100644
index 57cce7b..0000000
--- a/src/superio/winbond/wpcd376i/Kconfig
+++ /dev/null
@@ -1,19 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-## Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_WINBOND_WPCD376I
- bool
- select SUPERIO_WINBOND_COMMON_PRE_RAM
diff --git a/src/superio/winbond/wpcd376i/Makefile.inc b/src/superio/winbond/wpcd376i/Makefile.inc
deleted file mode 100644
index cebd175..0000000
--- a/src/superio/winbond/wpcd376i/Makefile.inc
+++ /dev/null
@@ -1,20 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2000 AG Electronics Ltd.
-## Copyright (C) 2003-2004 Linux Networx
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-bootblock-$(CONFIG_SUPERIO_WINBOND_WPCD376I) += early_serial.c
-romstage-$(CONFIG_SUPERIO_WINBOND_WPCD376I) += early_serial.c
-ramstage-$(CONFIG_SUPERIO_WINBOND_WPCD376I) += superio.c
diff --git a/src/superio/winbond/wpcd376i/chip.h b/src/superio/winbond/wpcd376i/chip.h
deleted file mode 100644
index c16743d..0000000
--- a/src/superio/winbond/wpcd376i/chip.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_WINBOND_WPCD376I_CHIP_H
-#define SUPERIO_WINBOND_WPCD376I_CHIP_H
-
-struct superio_winbond_wpcd376i_config {
-};
-#endif
diff --git a/src/superio/winbond/wpcd376i/early_serial.c b/src/superio/winbond/wpcd376i/early_serial.c
deleted file mode 100644
index 9f9ff6b..0000000
--- a/src/superio/winbond/wpcd376i/early_serial.c
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Marc Jones <marcj303@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/* Pre-RAM driver for the Winbond WPCD376I Super I/O chip. */
-
-
-#include <device/pnp_ops.h>
-#include <device/pnp_def.h>
-#include "wpcd376i.h"
-
-void wpcd376i_enable_serial(pnp_devfn_t dev, u16 iobase)
-{
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
- pnp_set_enable(dev, 1);
-}
diff --git a/src/superio/winbond/wpcd376i/superio.c b/src/superio/winbond/wpcd376i/superio.c
deleted file mode 100644
index ae4fce4..0000000
--- a/src/superio/winbond/wpcd376i/superio.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <device/device.h>
-#include <device/pnp.h>
-#include <drivers/uart/uart8250reg.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-#include "chip.h"
-#include "wpcd376i.h"
-
-static void init(struct device *dev)
-{
- if (!dev->enabled)
- return;
-
- switch (dev->path.pnp.device) {
- case WPCD376I_KBCK:
- pc_keyboard_init(NO_AUX_DEVICE);
- break;
- }
-}
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_enable,
- .init = init,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- { NULL, WPCD376I_FDC,
- PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_MSC0 | PNP_MSC1 | PNP_MSC8,
- 0x07f8, },
- { NULL, WPCD376I_LPT,
- PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_MSC0 | PNP_MSC8,
- 0x03f8, },
- { NULL, WPCD376I_SP1,
- PNP_IO0 | PNP_IRQ0 | PNP_MSC0,
- 0x07f8, },
- { NULL, WPCD376I_SWC,
- PNP_IO0 | PNP_IO1 | PNP_IRQ0,
- 0xfff0, 0xfff0, },
- { NULL, WPCD376I_KBCM,
- PNP_IRQ0, },
- { NULL, WPCD376I_KBCK,
- PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_MSC0,
- 0x07f8, 0x07f8, },
- { NULL, WPCD376I_GPIO,
- PNP_IO0 | PNP_IRQ0 | PNP_MSC0 | PNP_MSC1 | PNP_MSC2 | PNP_MSC3 |
- PNP_MSC8,
- 0xffe0, },
- { NULL, WPCD376I_ECIR,
- PNP_IO0 | PNP_IO1 | PNP_IRQ0,
- 0xfff0, 0xfff0, },
- { NULL, WPCD376I_IR,
- PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1 | PNP_MSC0,
- 0xfff8, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_winbond_wpcd376i_ops = {
- CHIP_NAME("Winbond WPCD376I Super I/O")
- .enable_dev = enable_dev,
-};
diff --git a/src/superio/winbond/wpcd376i/wpcd376i.h b/src/superio/winbond/wpcd376i/wpcd376i.h
deleted file mode 100644
index a90b13b..0000000
--- a/src/superio/winbond/wpcd376i/wpcd376i.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_WINBOND_WPCD376I_WPCD376I_H
-#define SUPERIO_WINBOND_WPCD376I_WPCD376I_H
-
-#include <device/pnp_type.h>
-
-/* Logical Device Numbers (LDN). */
-#define WPCD376I_FDC 0x00 /* Floppy */
-#define WPCD376I_LPT 0x01 /* Parallel port */
-/* 0x02 Undefined */
-#define WPCD376I_SP1 0x03 /* UART1 */
-#define WPCD376I_SWC 0x04 /* System wake-up control */
-#define WPCD376I_KBCM 0x05 /* PS/2 mouse */
-#define WPCD376I_KBCK 0x06 /* PS/2 keyboard */
-#define WPCD376I_GPIO 0x07 /* General Purpose I/O */
-#define WPCD376I_ECIR 0x15 /* Enhanced Consumer Infrared Functions (ECIR) */
-#define WPCD376I_IR 0x16 /* UART3 & Infrared port */
-
-void wpcd376i_enable_serial(pnp_devfn_t dev, u16 iobase);
-
-#endif