commit d26844ce823791acbc95fb3e109d948b9c36995c
author Elyes HAOUAS <ehaouas@noos.fr> Fri Jun 21 07:31:40 2019 +0200
committer Felix Held <felix-coreboot@felixheld.de> Fri Jun 21 16:04:16 2019 +0000
tree f87a19d0d922a2218a8821923aa32d6823059b2c
parent e2d152c118af73500d5c6162c0c1407712458742

cpu: Add missing #include <commonlib/helpers.h>

ALIGN and ALIGN_UP needs 'helpers.h'

Change-Id: Ib3a9e0d6caff69f4b0adb54364b47cc6ac52a610
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33658
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

src/cpu/amd/car/post_cache_as_ram.c

diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c
index f49c676..50ed657 100644
--- a/src/cpu/amd/car/post_cache_as_ram.c
+++ b/src/cpu/amd/car/post_cache_as_ram.c
@@ -16,10 +16,12 @@
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
+
 #include <string.h>
 #include <console/console.h>
 #include <arch/stages.h>
 #include <arch/early_variables.h>
+#include <commonlib/helpers.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/amd/car.h>

src/cpu/intel/car/romstage.c

diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
index a7daff4..89052d6 100644
--- a/src/cpu/intel/car/romstage.c
+++ b/src/cpu/intel/car/romstage.c
@@ -16,6 +16,7 @@
 #include <cpu/intel/romstage.h>
 #include <cpu/x86/mtrr.h>
 #include <arch/symbols.h>
+#include <commonlib/helpers.h>
 #include <program_loading.h>
 #include <timestamp.h>
 

src/cpu/intel/haswell/romstage.c

diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 0426bb4..3cbdf44 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -24,6 +24,7 @@
 #include <device/pci_def.h>
 #include <cpu/x86/lapic.h>
 #include <cbmem.h>
+#include <commonlib/helpers.h>
 #include <program_loading.h>
 #include <romstage_handoff.h>
 #include <vendorcode/google/chromeos/chromeos.h>

src/cpu/intel/smm/gen1/smmrelocate.c

diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c
index f3192bc..d52043f 100644
--- a/src/cpu/intel/smm/gen1/smmrelocate.c
+++ b/src/cpu/intel/smm/gen1/smmrelocate.c
@@ -21,6 +21,7 @@
 #include <string.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <commonlib/helpers.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/mp.h>
 #include <cpu/x86/msr.h>

src/cpu/x86/mirror_payload.c

diff --git a/src/cpu/x86/mirror_payload.c b/src/cpu/x86/mirror_payload.c
index 6da2164..88c5e81 100644
--- a/src/cpu/x86/mirror_payload.c
+++ b/src/cpu/x86/mirror_payload.c
@@ -16,6 +16,7 @@
 #include <stdint.h>
 #include <stdlib.h>
 #include <string.h>
+#include <commonlib/helpers.h>
 #include <console/console.h>
 #include <bootmem.h>
 #include <program_loading.h>

src/cpu/x86/mtrr/mtrr.c

diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index 60eee31..e9efc8b 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -25,6 +25,7 @@
 #include <stdlib.h>
 #include <string.h>
 #include <bootstate.h>
+#include <commonlib/helpers.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci_ids.h>

src/cpu/x86/smm/smm_module_loader.c

diff --git a/src/cpu/x86/smm/smm_module_loader.c b/src/cpu/x86/smm/smm_module_loader.c
index 80b2c27..b3ffb3d 100644
--- a/src/cpu/x86/smm/smm_module_loader.c
+++ b/src/cpu/x86/smm/smm_module_loader.c
@@ -17,6 +17,7 @@
 #include <rmodule.h>
 #include <cpu/x86/smm.h>
 #include <cpu/x86/cache.h>
+#include <commonlib/helpers.h>
 #include <console/console.h>
 
 #define FXSAVE_SIZE 512