Restructure i3100 Super I/O driver to match the rest of the codebase.
- i3100_early_serial.c:
- Split out enter/exit functions as the other Super I/Os do.
- Make i3100_enable_serial() take a device_t as usual, and convert
it to use the standard pnp_* function instead of open-coding
the same functionality by hand.
- Factor out i3100_configure_uart_clk() from i3100_enable_serial(),
we do the same in various other Super I/Os, e.g. ITE ones.
- Add some #defines for register / bit values and some comments.
- Only functional change: Don't set bit 1 of SIW_CONFIGURATION, it's
marked as "READ ONLY, WRITES IGNORED" in the datasheet.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6058 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c
index 89fb543..f36e4a4 100644
--- a/src/mainboard/intel/mtarvon/romstage.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
@@ -40,6 +40,8 @@
#define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0)
#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
+#define SERIAL_DEV PNP_DEV(0x4e, I3100_SP1)
+
static inline int spd_read_byte(u16 device, u8 address)
{
return smbus_read_byte(device, address);
@@ -75,9 +77,12 @@
}
#endif
}
+
/* Set up the console */
i3100_enable_superio();
- i3100_enable_serial(0x4e, I3100_SP1, CONFIG_TTYS0_BASE);
+ i3100_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ i3100_configure_uart_clk(SERIAL_DEV, I3100_UART_CLK_PREDIVIDE_26);
+
uart_init();
console_init();