nb/intel/haswell: Drop `gpu_panel_port_select`
The corresponding bits in PP_ON_DELAYS are reserved MBZ.
Change-Id: Icd2554c928a5908dfb354b81d3e6c5b5f242f1d1
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45034
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
diff --git a/src/mainboard/google/slippy/variants/falco/overridetree.cb b/src/mainboard/google/slippy/variants/falco/overridetree.cb
index c163202..7df0ca1 100644
--- a/src/mainboard/google/slippy/variants/falco/overridetree.cb
+++ b/src/mainboard/google/slippy/variants/falco/overridetree.cb
@@ -1,7 +1,6 @@
chip northbridge/intel/haswell
- # Enable Panel and configure power delays
- register "gpu_panel_port_select" = "1" # eDP
+ # Set panel power delays
register "gpu_panel_power_cycle_delay" = "5" # 400ms (T4)
register "gpu_panel_power_up_delay" = "600" # 60ms (T1+T2)
register "gpu_panel_power_down_delay" = "600" # 60ms (T3+T7)
diff --git a/src/mainboard/google/slippy/variants/leon/overridetree.cb b/src/mainboard/google/slippy/variants/leon/overridetree.cb
index f3b5c4a..6dee38e 100644
--- a/src/mainboard/google/slippy/variants/leon/overridetree.cb
+++ b/src/mainboard/google/slippy/variants/leon/overridetree.cb
@@ -1,7 +1,6 @@
chip northbridge/intel/haswell
- # Enable Panel and configure power delays
- register "gpu_panel_port_select" = "1" # eDP
+ # Set panel power delays
register "gpu_panel_power_cycle_delay" = "5" # 400ms
register "gpu_panel_power_up_delay" = "400" # 40ms
register "gpu_panel_power_down_delay" = "150" # 15ms
diff --git a/src/mainboard/google/slippy/variants/peppy/overridetree.cb b/src/mainboard/google/slippy/variants/peppy/overridetree.cb
index cd6a0df..689fee4 100644
--- a/src/mainboard/google/slippy/variants/peppy/overridetree.cb
+++ b/src/mainboard/google/slippy/variants/peppy/overridetree.cb
@@ -1,7 +1,6 @@
chip northbridge/intel/haswell
- # Enable Panel and configure power delays
- register "gpu_panel_port_select" = "1" # eDP
+ # Set panel power delays
register "gpu_panel_power_cycle_delay" = "5" # 400ms
register "gpu_panel_power_up_delay" = "400" # 40ms
register "gpu_panel_power_down_delay" = "150" # 15ms
diff --git a/src/mainboard/google/slippy/variants/wolf/overridetree.cb b/src/mainboard/google/slippy/variants/wolf/overridetree.cb
index 5ccca1d..de61839 100644
--- a/src/mainboard/google/slippy/variants/wolf/overridetree.cb
+++ b/src/mainboard/google/slippy/variants/wolf/overridetree.cb
@@ -1,7 +1,6 @@
chip northbridge/intel/haswell
- # Enable Panel and configure power delays
- register "gpu_panel_port_select" = "1" # eDP
+ # Set panel power delays
register "gpu_panel_power_cycle_delay" = "6" # 500ms (T11+T12)
register "gpu_panel_power_up_delay" = "2000" # 200ms (T3)
register "gpu_panel_power_down_delay" = "500" # 50ms (T10)
diff --git a/src/mainboard/lenovo/t440p/devicetree.cb b/src/mainboard/lenovo/t440p/devicetree.cb
index 60728c4..8c35681 100644
--- a/src/mainboard/lenovo/t440p/devicetree.cb
+++ b/src/mainboard/lenovo/t440p/devicetree.cb
@@ -4,7 +4,6 @@
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"
register "gpu_dp_d_hotplug" = "4"
- register "gpu_panel_port_select" = "0"
register "gpu_panel_power_backlight_off_delay" = "1"
register "gpu_panel_power_backlight_on_delay" = "1"
register "gpu_panel_power_cycle_delay" = "6"
diff --git a/src/northbridge/intel/haswell/chip.h b/src/northbridge/intel/haswell/chip.h
index 28c0828..73375d7 100644
--- a/src/northbridge/intel/haswell/chip.h
+++ b/src/northbridge/intel/haswell/chip.h
@@ -17,7 +17,6 @@
u8 gpu_dp_c_hotplug; /* Digital Port C Hotplug Config */
u8 gpu_dp_d_hotplug; /* Digital Port D Hotplug Config */
- u8 gpu_panel_port_select; /* 0=LVDS 1=DP_B 2=DP_C 3=DP_D */
u8 gpu_panel_power_cycle_delay; /* T4 time sequence */
u16 gpu_panel_power_up_delay; /* T1+T2 time sequence */
u16 gpu_panel_power_down_delay; /* T3 time sequence */
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index c466c09..5a6bb8e 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -304,7 +304,6 @@
/* Setup Panel Power On Delays */
reg32 = gtt_read(PCH_PP_ON_DELAYS);
if (!reg32) {
- reg32 = (conf->gpu_panel_port_select & 0x3) << 30;
reg32 |= (conf->gpu_panel_power_up_delay & 0x1fff) << 16;
reg32 |= (conf->gpu_panel_power_backlight_on_delay & 0x1fff);
gtt_write(PCH_PP_ON_DELAYS, reg32);