tree 62ae0b8a88e9b1105511022cb7a5a2185111cb03
parent 3c965dc3ac650b96097693d17cf1b96aec63b981
author Mario Scheithauer <mario.scheithauer@siemens.com> 1643272400 +0100
committer Felix Held <felix-coreboot@felixheld.de> 1643896174 +0000

mb/siemens/mc_ehl2: Disable PCIe RPs

With latest hardware revision only PCIe RP2 and RP7 are used on this
mainboard.

Change-Id: I7702c2b9058dde1c819cb1df8a68fd602f5997da
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61415
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>