commit cf81b8294b95c13b27aa9f53ca8e958699b4290c
author Duncan Laurie <dlaurie@chromium.org> Wed Aug 08 13:43:55 2012 -0700
committer Stefan Reinauer <stefan.reinauer@coreboot.org> Wed Nov 07 04:01:37 2012 +0100
tree 5de5a9bf4a7f900b73c642fce5168699b64ae344
parent fc1b9ee4aa19e698b07aaa050949b791aa119847

CMOS: Move MRC seed offset into upper bank

This will allow the lower bank to be cleared without impacting the
ability to suspend/resume.

Change-Id: Iaec3c9e7e40c334053c814eaddd1f614df245a73
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/1696
Reviewed-by: Marc Jones <marcj303@gmail.com>
Tested-by: build bot (Jenkins)

src/northbridge/intel/sandybridge/raminit.c

diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 696417f..d0d12b2 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -50,9 +50,9 @@
 #define CMOS_OFFSET_MRC_SEED_S3  (CMOS_VSTART_mrc_scrambler_seed_s3 >> 3)
 #define CMOS_OFFSET_MRC_SEED_CHK (CMOS_VSTART_mrc_scrambler_seed_chk >> 3)
 #else
-#define CMOS_OFFSET_MRC_SEED     112
-#define CMOS_OFFSET_MRC_SEED_S3  116
-#define CMOS_OFFSET_MRC_SEED_CHK 120
+#define CMOS_OFFSET_MRC_SEED     152
+#define CMOS_OFFSET_MRC_SEED_S3  156
+#define CMOS_OFFSET_MRC_SEED_CHK 160
 #endif
 
 static void save_mrc_data(struct pei_data *pei_data)