| commit | 51d43fc9c5aab428d589b602759476d716fbea6e | [log] [tgz] |
|---|---|---|
| author | Zhao, Lijian <lijian.zhao@intel.com> | Wed Jan 20 13:02:38 2016 -0800 |
| committer | Martin Roth <martinroth@google.com> | Mon Apr 11 18:23:08 2016 +0200 |
| tree | f34c04ce843bc18cb0c85923489d5d51b5ae8eef | |
| parent | 30461a91977d6770bb3ec6c378a21afe2616f3d7 [diff] |
soc/intel/apollolake: Add lpss dsdt entry Add southbridge and LPSS device DSDT table. Change-Id: I0607398408900d8c5d543ecd5e5d4830d2a70bf1 Signed-off-by: Zhao, Lijian <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/14218 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>