mb/google/volteer: do UART pad config at board-level
UART pad configuration should not be done in common code, because that
may cause short circuits, when the user sets a wrong UART index. Thus,
add the corresponding pads to the early UART gpio table for the board as
a first step. Common UART pad config code then gets dropped in CB:48829.
Also switch to `bootblock_mainboard_early_init` to configure the pads in
early bootblock before console initialization, to make the console work
as early as possible. The board does not do any other gpio configuration
in bootblock, so this should not influence behaviour in a negative way
(e.g. breaking overrides).
Change-Id: I5e07584d7857052c7a9388331a475f5a073af038
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49425
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/mainboard/google/volteer/bootblock.c b/src/mainboard/google/volteer/bootblock.c
index 328480e..6ee655e 100644
--- a/src/mainboard/google/volteer/bootblock.c
+++ b/src/mainboard/google/volteer/bootblock.c
@@ -3,7 +3,7 @@
#include <baseboard/variants.h>
#include <bootblock_common.h>
-void bootblock_mainboard_init(void)
+void bootblock_mainboard_early_init(void)
{
const struct pad_config *pads;
size_t num;
diff --git a/src/mainboard/google/volteer/variants/baseboard/gpio.c b/src/mainboard/google/volteer/variants/baseboard/gpio.c
index 2030f31..5ae3a02 100644
--- a/src/mainboard/google/volteer/variants/baseboard/gpio.c
+++ b/src/mainboard/google/volteer/variants/baseboard/gpio.c
@@ -398,6 +398,11 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
+ /* C8 : UART0 RX */
+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
+ /* C9 : UART0 TX */
+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
+
/* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */
PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
/* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */
diff --git a/src/mainboard/google/volteer/variants/delbin/gpio.c b/src/mainboard/google/volteer/variants/delbin/gpio.c
index 5571ee8..dbf4677 100644
--- a/src/mainboard/google/volteer/variants/delbin/gpio.c
+++ b/src/mainboard/google/volteer/variants/delbin/gpio.c
@@ -125,6 +125,11 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
+ /* C8 : UART0 RX */
+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
+ /* C9 : UART0 TX */
+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
+
/* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */
PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
/* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */
diff --git a/src/mainboard/google/volteer/variants/eldrid/gpio.c b/src/mainboard/google/volteer/variants/eldrid/gpio.c
index d2b08bc6..6810ba5 100644
--- a/src/mainboard/google/volteer/variants/eldrid/gpio.c
+++ b/src/mainboard/google/volteer/variants/eldrid/gpio.c
@@ -164,6 +164,11 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
+ /* C8 : UART0 RX */
+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
+ /* C9 : UART0 TX */
+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
+
/* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */
PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
/* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */
diff --git a/src/mainboard/google/volteer/variants/elemi/gpio.c b/src/mainboard/google/volteer/variants/elemi/gpio.c
index ecb3c19..bbdb517 100644
--- a/src/mainboard/google/volteer/variants/elemi/gpio.c
+++ b/src/mainboard/google/volteer/variants/elemi/gpio.c
@@ -178,6 +178,11 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
+ /* C8 : UART0 RX */
+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
+ /* C9 : UART0 TX */
+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
+
/* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */
PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
/* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */
diff --git a/src/mainboard/google/volteer/variants/halvor/gpio.c b/src/mainboard/google/volteer/variants/halvor/gpio.c
index 378c150..c98003b 100644
--- a/src/mainboard/google/volteer/variants/halvor/gpio.c
+++ b/src/mainboard/google/volteer/variants/halvor/gpio.c
@@ -196,6 +196,11 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
+ /* C8 : UART0 RX */
+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
+ /* C9 : UART0 TX */
+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
+
/* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */
PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
/* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */
diff --git a/src/mainboard/google/volteer/variants/lindar/gpio.c b/src/mainboard/google/volteer/variants/lindar/gpio.c
index 1d3d693..44e3148 100644
--- a/src/mainboard/google/volteer/variants/lindar/gpio.c
+++ b/src/mainboard/google/volteer/variants/lindar/gpio.c
@@ -107,6 +107,11 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
+ /* C8 : UART0 RX */
+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
+ /* C9 : UART0 TX */
+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
+
/* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */
PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
/* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */
diff --git a/src/mainboard/google/volteer/variants/malefor/gpio.c b/src/mainboard/google/volteer/variants/malefor/gpio.c
index 2498981..3a98081 100644
--- a/src/mainboard/google/volteer/variants/malefor/gpio.c
+++ b/src/mainboard/google/volteer/variants/malefor/gpio.c
@@ -153,6 +153,11 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
+ /* C8 : UART0 RX */
+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
+ /* C9 : UART0 TX */
+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
+
/* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */
PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
/* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */
diff --git a/src/mainboard/google/volteer/variants/terrador/gpio.c b/src/mainboard/google/volteer/variants/terrador/gpio.c
index 79722d8..80e1b96 100644
--- a/src/mainboard/google/volteer/variants/terrador/gpio.c
+++ b/src/mainboard/google/volteer/variants/terrador/gpio.c
@@ -187,6 +187,11 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
+ /* C8 : UART0 RX */
+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
+ /* C9 : UART0 TX */
+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
+
/* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */
PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
/* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */
diff --git a/src/mainboard/google/volteer/variants/todor/gpio.c b/src/mainboard/google/volteer/variants/todor/gpio.c
index 0391964..5611cca 100644
--- a/src/mainboard/google/volteer/variants/todor/gpio.c
+++ b/src/mainboard/google/volteer/variants/todor/gpio.c
@@ -195,6 +195,11 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
+ /* C8 : UART0 RX */
+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
+ /* C9 : UART0 TX */
+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
+
/* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */
PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
/* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */
diff --git a/src/mainboard/google/volteer/variants/trondo/gpio.c b/src/mainboard/google/volteer/variants/trondo/gpio.c
index a54aeca..11b051b 100644
--- a/src/mainboard/google/volteer/variants/trondo/gpio.c
+++ b/src/mainboard/google/volteer/variants/trondo/gpio.c
@@ -17,7 +17,10 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
-
+ /* C8 : UART0 RX */
+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
+ /* C9 : UART0 TX */
+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
};
const struct pad_config *variant_early_gpio_table(size_t *num)
diff --git a/src/mainboard/google/volteer/variants/voema/gpio.c b/src/mainboard/google/volteer/variants/voema/gpio.c
index 5bf6fad..da85260 100644
--- a/src/mainboard/google/volteer/variants/voema/gpio.c
+++ b/src/mainboard/google/volteer/variants/voema/gpio.c
@@ -185,6 +185,11 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
+ /* C8 : UART0 RX */
+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
+ /* C9 : UART0 TX */
+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
+
/* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */
PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
/* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */
diff --git a/src/mainboard/google/volteer/variants/volteer/gpio.c b/src/mainboard/google/volteer/variants/volteer/gpio.c
index 0d230fd..0dab148 100644
--- a/src/mainboard/google/volteer/variants/volteer/gpio.c
+++ b/src/mainboard/google/volteer/variants/volteer/gpio.c
@@ -208,6 +208,11 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
+ /* C8 : UART0 RX */
+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
+ /* C9 : UART0 TX */
+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
+
/* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */
PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
/* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */
diff --git a/src/mainboard/google/volteer/variants/volteer2/gpio.c b/src/mainboard/google/volteer/variants/volteer2/gpio.c
index cfd9e8b..262c016 100644
--- a/src/mainboard/google/volteer/variants/volteer2/gpio.c
+++ b/src/mainboard/google/volteer/variants/volteer2/gpio.c
@@ -210,6 +210,11 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
+ /* C8 : UART0 RX */
+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
+ /* C9 : UART0 TX */
+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
+
/* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */
PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
/* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */
diff --git a/src/mainboard/google/volteer/variants/voxel/gpio.c b/src/mainboard/google/volteer/variants/voxel/gpio.c
index d6df489..b8d1f39 100644
--- a/src/mainboard/google/volteer/variants/voxel/gpio.c
+++ b/src/mainboard/google/volteer/variants/voxel/gpio.c
@@ -237,6 +237,11 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
+ /* C8 : UART0 RX */
+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
+ /* C9 : UART0 TX */
+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
+
/* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */
PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
/* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */