soc/intel/xeon_sp: Add IIO resources via SSDT
There is no need to inject this code in DSDT. Just generating a _CRS
Name in SSDT containing a resource template works well and reduces the
need to sync up on names being used to return _CRS names in DSDT.
TEST=intel/archercity CRB
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I691d7497dceb89619652e5523a29ea30a7b0fab8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
diff --git a/src/soc/intel/xeon_sp/skx/soc_acpi.c b/src/soc/intel/xeon_sp/skx/soc_acpi.c
index 35e3ea1..dfbd878 100644
--- a/src/soc/intel/xeon_sp/skx/soc_acpi.c
+++ b/src/soc/intel/xeon_sp/skx/soc_acpi.c
@@ -54,7 +54,7 @@
fill_fadt_extended_pm_io(fadt);
}
-void uncore_inject_dsdt(const struct device *device)
+void uncore_fill_ssdt(const struct device *device)
{
const IIO_UDS *hob = get_iio_uds();
@@ -62,7 +62,6 @@
if (device->bus->secondary != 0)
return;
- acpigen_write_scope("\\_SB");
for (int socket = 0, iio = 0; iio < hob->PlatformData.numofIIO; ++socket) {
if (!soc_cpu_is_enabled(socket))
continue;
@@ -72,10 +71,12 @@
for (int stack = 0; stack <= PSTACK2; ++stack) {
const STACK_RES *ri = &iio_resource.StackRes[stack];
char rtname[16];
- snprintf(rtname, sizeof(rtname), "RT%02x",
- (socket*MAX_IIO_STACK)+stack);
- acpigen_write_name(rtname);
+ snprintf(rtname, sizeof(rtname), "\\_SB.PC%02x", socket * MAX_IIO_STACK + stack);
+ acpigen_write_scope(rtname);
+
+ acpigen_write_name("_CRS");
+
printk(BIOS_DEBUG, "\tCreating ResourceTemplate %s for socket: %d, stack: %d\n",
rtname, socket, stack);
@@ -126,9 +127,11 @@
(ri->PciResourceMem64Limit - ri->PciResourceMem64Base + 1));
acpigen_write_resourcetemplate_footer();
+
+ /* Scope */
+ acpigen_pop_len();
}
}
- acpigen_pop_len();
}
void soc_power_states_generation(int core, int cores_per_package)