commit cd49cce7b70e80b4acc49b56bb2bb94370b4d867
author Julius Werner <jwerner@chromium.org> Tue Mar 05 16:53:33 2019 -0800
committer Patrick Georgi <pgeorgi@google.com> Fri Mar 08 08:33:24 2019 +0000
tree 8e89136e2da7cf54453ba8c112eda94415b56242
parent b3a8cc54dbaf833c590a56f912209a5632b71f49

coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)

This patch is a raw application of

 find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'

Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/southbridge/intel/bd82x6x/pch.h

diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 5dac57e..67b0d11 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -47,9 +47,9 @@
 
 #include <southbridge/intel/common/rcba.h>
 
-#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_BD82X6X)
+#if CONFIG(SOUTHBRIDGE_INTEL_BD82X6X)
 #define CROS_GPIO_DEVICE_NAME	"CougarPoint"
-#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_C216)
+#elif CONFIG(SOUTHBRIDGE_INTEL_C216)
 #define CROS_GPIO_DEVICE_NAME	"PantherPoint"
 #endif