diff --git a/src/soc/intel/broadwell/pcie.c b/src/soc/intel/broadwell/pcie.c
index 3fd5ea4..32135ee 100644
--- a/src/soc/intel/broadwell/pcie.c
+++ b/src/soc/intel/broadwell/pcie.c
@@ -555,7 +555,7 @@
 	pci_update_config8(dev, 0xf5, 0x0f, 0);
 
 	/* Set AER Extended Cap ID to 01h and Next Cap Pointer to 200h. */
-	if (IS_ENABLED(CONFIG_PCIEXP_AER))
+	if (CONFIG(PCIEXP_AER))
 		pci_update_config32(dev, 0x100, ~(1 << 29) & ~0xfffff,
 			(1 << 29) | 0x10001);
 	else
@@ -563,7 +563,7 @@
 			(1 << 29));
 
 	/* Set L1 Sub-State Cap ID to 1Eh and Next Cap Pointer to None. */
-	if (IS_ENABLED(CONFIG_PCIEXP_L1_SUB_STATE))
+	if (CONFIG(PCIEXP_L1_SUB_STATE))
 		pci_update_config32(dev, 0x200, ~0xfffff, 0x001e);
 	else
 		pci_update_config32(dev, 0x200, ~0xfffff, 0);