| commit | cd366349947cfe0a056a5913cca6b5151c32e8f6 | [log] [tgz] |
|---|---|---|
| author | Arthur Heymans <arthur@aheymans.xyz> | Sun Dec 30 12:49:21 2018 +0100 |
| committer | Patrick Georgi <pgeorgi@google.com> | Thu Jan 03 22:32:50 2019 +0000 |
| tree | 2e68f7dff7fee1cfd69955aaff3350660a0033f4 | |
| parent | d0cc3bc5ce36c35d8d69fd4a384abc41ce385d30 [diff] [blame] |
sb/intel/bd82x6x: Move pcie ACPI code to a common place Change-Id: I45144f9c397ff9a0be011990ba33db9ffef351e7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/30527 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
diff --git a/src/southbridge/intel/bd82x6x/acpi/pch.asl b/src/southbridge/intel/bd82x6x/acpi/pch.asl index a068bc0..d3aa7a4 100644 --- a/src/southbridge/intel/bd82x6x/acpi/pch.asl +++ b/src/southbridge/intel/bd82x6x/acpi/pch.asl
@@ -238,7 +238,7 @@ #include "audio.asl" // PCI Express Ports 0:1c.x -#include "pcie.asl" +#include <southbridge/intel/common/acpi/pcie.asl> // USB EHCI 0:1d.0 and 0:1a.0, XHCI 0:14.0 #include "usb.asl"