tree 76d675734dce3a4b34fb86285873fa6258e0c39e
parent f09221c033a27d87f39ab074ee53a109a861f096
author Felix Held <felix-coreboot@felixheld.de> 1611357488 +0100
committer Felix Held <felix-coreboot@felixheld.de> 1611512177 +0000

soc/amd/cezanne/Kconfig: select missing SSE2 option

This will set the corresponding enable bit in CR4 in bootblock_crt0.S

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I648a83fbcb71456bf1e5b11c491e7cadc8e0e281
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49852
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>