soc/intel/mtl: Keep SOC_INTEL_COMMON_BASECODE_RAMTOP for non-ChromeOS
This patch guarantees that non-ChromeOS platforms continue to enable
early caching.
ChromeOS devices, on the other hand, control this configuration through
the motherboard configuration based on the underlying SoC.
BUG=b:306677879
TEST=Enable SOC_INTEL_COMMON_BASECODE_RAMTOP for google/rex.
Change-Id: I412b2b6a807dc0f5f2632f0fbd56bd37689dead3
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79049
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index 923a2b4..e95756f 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -79,7 +79,7 @@
select SOC_INTEL_COMMON_BLOCK_XHCI
select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
select SOC_INTEL_COMMON_BASECODE
- select SOC_INTEL_COMMON_BASECODE_RAMTOP
+ select SOC_INTEL_COMMON_BASECODE_RAMTOP if !MAINBOARD_HAS_CHROMEOS
select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_CLIENT
select SOC_INTEL_COMMON_RESET
diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c
index 2c39bcd..9534fc1 100644
--- a/src/soc/intel/meteorlake/romstage/fsp_params.c
+++ b/src/soc/intel/meteorlake/romstage/fsp_params.c
@@ -181,7 +181,8 @@
m_cfg->TmeEnable = CONFIG(INTEL_TME) && is_tme_supported();
if (!m_cfg->TmeEnable)
return;
- m_cfg->GenerateNewTmeKey = CONFIG(TME_KEY_REGENERATION_ON_WARM_BOOT);
+ m_cfg->GenerateNewTmeKey = CONFIG(TME_KEY_REGENERATION_ON_WARM_BOOT) &&
+ CONFIG(SOC_INTEL_COMMON_BASECODE_RAMTOP);
if (m_cfg->GenerateNewTmeKey) {
uint32_t ram_top = get_ramtop_addr();
if (!ram_top) {