cpu/intel/haswell: Rename `HASWELL_BCLK` to `CPU_BCLK`
This is just to ease merging with Broadwell.
Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical.
Change-Id: I9239489fe48f04714e6626b57ef07ca8b3013024
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46910
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/cpu/intel/haswell/acpi.c b/src/cpu/intel/haswell/acpi.c
index 6dd8559..b757dc6 100644
--- a/src/cpu/intel/haswell/acpi.c
+++ b/src/cpu/intel/haswell/acpi.c
@@ -209,7 +209,7 @@
/* Max Non-Turbo Ratio */
ratio_max = (msr.lo >> 8) & 0xff;
}
- clock_max = ratio_max * HASWELL_BCLK;
+ clock_max = ratio_max * CPU_BCLK;
/* Calculate CPU TDP in mW */
msr = rdmsr(MSR_PKG_POWER_SKU_UNIT);
@@ -273,7 +273,7 @@
/* Calculate power at this ratio */
power = calculate_power(power_max, ratio_max, ratio);
- clock = ratio * HASWELL_BCLK;
+ clock = ratio * CPU_BCLK;
acpigen_write_PSS_package(
clock, /*MHz*/
diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h
index 9349a3d..0701332 100644
--- a/src/cpu/intel/haswell/haswell.h
+++ b/src/cpu/intel/haswell/haswell.h
@@ -18,7 +18,7 @@
#define HASWELL_STEPPING_ULT_C0 1
/* Haswell bus clock is fixed at 100MHz */
-#define HASWELL_BCLK 100
+#define CPU_BCLK 100
#define MSR_CORE_THREAD_COUNT 0x35
#define MSR_FEATURE_CONFIG 0x13c
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c
index 32b6a9d..4b73c6a 100644
--- a/src/cpu/intel/haswell/haswell_init.c
+++ b/src/cpu/intel/haswell/haswell_init.c
@@ -596,7 +596,7 @@
wrmsr(IA32_PERF_CTL, perf_ctl);
printk(BIOS_DEBUG, "CPU: frequency set to %d\n",
- ((perf_ctl.lo >> 8) & 0xff) * HASWELL_BCLK);
+ ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK);
}
static void configure_mca(void)