bd82x6x: Add config option to force SATA link to different speeds.
Certain SATA devices claim to support SATA 6 Gbps, but in fact have
bugs. For these devices, add a config option to force the SATA link
speed to something other than default.
Change-Id: I2dc1793cd58771298a392345162d39d20eb0afbb
Signed-off-by: Shawn Nematbakhsh <shawnn@google.com>
Reviewed-on: http://review.coreboot.org/2765
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
diff --git a/src/southbridge/intel/bd82x6x/chip.h b/src/southbridge/intel/bd82x6x/chip.h
index 746e300..828466c 100644
--- a/src/southbridge/intel/bd82x6x/chip.h
+++ b/src/southbridge/intel/bd82x6x/chip.h
@@ -70,6 +70,17 @@
uint32_t sata_port0_gen3_tx;
uint32_t sata_port1_gen3_tx;
+ /**
+ * SATA Interface Speed Support Configuration
+ *
+ * Only the lower two bits have a meaning:
+ * 00 - No effect (leave as chip default)
+ * 01 - 1.5 Gb/s maximum speed
+ * 10 - 3.0 Gb/s maximum speed
+ * 11 - 6.0 Gb/s maximum speed
+ */
+ uint8_t sata_interface_speed_support;
+
uint32_t gen1_dec;
uint32_t gen2_dec;
uint32_t gen3_dec;
diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c
index ddba521..594b09d 100644
--- a/src/southbridge/intel/bd82x6x/sata.c
+++ b/src/southbridge/intel/bd82x6x/sata.c
@@ -135,6 +135,13 @@
reg32 = read32(abar + 0x00);
reg32 |= 0x0c006000; // set PSC+SSC+SALP+SSS
reg32 &= ~0x00020060; // clear SXS+EMS+PMS
+ /* Set ISS, if available */
+ if (config->sata_interface_speed_support)
+ {
+ reg32 &= ~0x00f00000;
+ reg32 |= (config->sata_interface_speed_support & 0x03)
+ << 20;
+ }
write32(abar + 0x00, reg32);
/* PI (Ports implemented) */
write32(abar + 0x0c, config->sata_port_map);