| commit | c929f0933f5f4bbb15573a1bb64c799cd1fc3a02 | [log] [tgz] |
|---|---|---|
| author | Elyes Haouas <ehaouas@noos.fr> | Tue Oct 11 13:40:51 2022 +0200 |
| committer | Felix Held <felix-coreboot@felixheld.de> | Wed Oct 12 14:18:01 2022 +0000 |
| tree | 9d60591a5650e3814abb11910522ed60db288cd0 | |
| parent | baec560c7a6178edb9ba1e4d1d1bd6aee1852d0d [diff] [blame] |
treewide: Use 'gpe0_blk' for 'x_gpe0_blk.addrl' Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I05d5097097b925a7bc8058f4c23e7c13a49f03c5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68273 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
diff --git a/src/southbridge/intel/i82801dx/fadt.c b/src/southbridge/intel/i82801dx/fadt.c index b70808f..f64aad0 100644 --- a/src/southbridge/intel/i82801dx/fadt.c +++ b/src/southbridge/intel/i82801dx/fadt.c
@@ -75,6 +75,6 @@ fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_UNDEFINED; - fadt->x_gpe0_blk.addrl = pmbase + 0x28; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; }