soc/intel/common/opregion: Get rid of opregion.c
Get rid of custom opregion implementation and use drivers/intel/gma/opregion
implementation instead.
Test: boot Windows 10 on google/chell and google/edgar using Tianocore
payload with GOP init, observe Intel graphics driver loaded and functional.
Change-Id: I5f78e9030df12da5369d142dda5c59e576ebcef7
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/21703
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index 2322a5f..cf947a7 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -35,6 +35,7 @@
select HAVE_INTEL_FIRMWARE
select HAVE_MONOTONIC_TIMER
select HAVE_SMI_HANDLER
+ select INTEL_GMA_ACPI
select IOAPIC
select MRC_SETTINGS_PROTECT
select NO_FIXED_XIP_ROM_SIZE
@@ -87,7 +88,6 @@
select SOC_INTEL_COMMON_BLOCK_VMX
select SOC_INTEL_COMMON_BLOCK_XDCI
select SOC_INTEL_COMMON_BLOCK_XHCI
- select SOC_INTEL_COMMON_GFX_OPREGION
select SOC_INTEL_COMMON_NHLT
select SOC_INTEL_COMMON_RESET
select SSE2
diff --git a/src/soc/intel/skylake/graphics.c b/src/soc/intel/skylake/graphics.c
index f39f39c..95a37d6 100644
--- a/src/soc/intel/skylake/graphics.c
+++ b/src/soc/intel/skylake/graphics.c
@@ -18,7 +18,7 @@
#include <device/pci.h>
#include <drivers/intel/gma/i915_reg.h>
#include <intelblocks/graphics.h>
-#include <soc/intel/common/opregion.h>
+#include <drivers/intel/gma/opregion.h>
#include <soc/ramstage.h>
uintptr_t fsp_soc_get_igd_bar(void)
@@ -65,33 +65,7 @@
/* Initialize IGD OpRegion, called from ACPI code */
static void update_igd_opregion(igd_opregion_t *opregion)
{
- u16 reg16;
-
- opregion->mailbox1.clid = 1;
-
- /* Initialize Mailbox 3 */
- opregion->mailbox3.bclp = IGD_BACKLIGHT_BRIGHTNESS;
- opregion->mailbox3.pfit = IGD_FIELD_VALID | IGD_PFIT_STRETCH;
- opregion->mailbox3.pcft = 0; /* should be (IMON << 1) & 0x3e */
- opregion->mailbox3.cblv = IGD_FIELD_VALID | IGD_INITIAL_BRIGHTNESS;
- opregion->mailbox3.bclm[0] = IGD_WORD_FIELD_VALID + 0x0000;
- opregion->mailbox3.bclm[1] = IGD_WORD_FIELD_VALID + 0x0a19;
- opregion->mailbox3.bclm[2] = IGD_WORD_FIELD_VALID + 0x1433;
- opregion->mailbox3.bclm[3] = IGD_WORD_FIELD_VALID + 0x1e4c;
- opregion->mailbox3.bclm[4] = IGD_WORD_FIELD_VALID + 0x2866;
- opregion->mailbox3.bclm[5] = IGD_WORD_FIELD_VALID + 0x327f;
- opregion->mailbox3.bclm[6] = IGD_WORD_FIELD_VALID + 0x3c99;
- opregion->mailbox3.bclm[7] = IGD_WORD_FIELD_VALID + 0x46b2;
- opregion->mailbox3.bclm[8] = IGD_WORD_FIELD_VALID + 0x50cc;
- opregion->mailbox3.bclm[9] = IGD_WORD_FIELD_VALID + 0x5ae5;
- opregion->mailbox3.bclm[10] = IGD_WORD_FIELD_VALID + 0x64ff;
-
- /* TODO This may need to happen in S3 resume */
- pci_write_config32(SA_DEV_IGD, ASLS, (u32)opregion);
- reg16 = pci_read_config16(SA_DEV_IGD, SWSCI);
- reg16 &= ~GSSCIE;
- reg16 |= SMISCISEL;
- pci_write_config16(SA_DEV_IGD, SWSCI, reg16);
+ /* FIXME: Add platform specific mailbox initialization */
}
uintptr_t graphics_soc_write_acpi_opregion(struct device *device,
@@ -110,7 +84,7 @@
printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n");
opregion = (igd_opregion_t *)current;
- if (init_igd_opregion(opregion) != CB_SUCCESS)
+ if (intel_gma_init_igd_opregion(opregion) != CB_SUCCESS)
return current;
update_igd_opregion(opregion);
diff --git a/src/soc/intel/skylake/include/fsp20/soc/ramstage.h b/src/soc/intel/skylake/include/fsp20/soc/ramstage.h
index 23443c3..e75b350 100644
--- a/src/soc/intel/skylake/include/fsp20/soc/ramstage.h
+++ b/src/soc/intel/skylake/include/fsp20/soc/ramstage.h
@@ -21,7 +21,6 @@
#include <device/device.h>
#include <fsp/api.h>
#include <fsp/util.h>
-#include <soc/intel/common/opregion.h>
#define FSP_SIL_UPD FSP_S_CONFIG
#define FSP_MEM_UPD FSP_M_CONFIG