soc/intel/meteorlake: Account for GSPI2 everywhere
Commit e54a8fd43247d767f16a37f3e3150b2915d809bc (soc/intel/meteorlake:
Add entry for GSPI2 device) added an entry for the GSPI2 device in the
devicetree, but did not add any other entries. Ensure that the rest of
the code is aware of the GSPI2 device to avoid any problems.
Change-Id: Ib59bd289751bd96402c4adc61ffbee3bebe0edb0
Found-by: Coverity CID 1490681
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65916
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
diff --git a/src/soc/intel/meteorlake/chip.c b/src/soc/intel/meteorlake/chip.c
index 8139b5b..5b62c06 100644
--- a/src/soc/intel/meteorlake/chip.c
+++ b/src/soc/intel/meteorlake/chip.c
@@ -101,6 +101,7 @@
case PCI_DEVFN_UART2: return "UAR2";
case PCI_DEVFN_GSPI0: return "SPI0";
case PCI_DEVFN_GSPI1: return "SPI1";
+ case PCI_DEVFN_GSPI2: return "SPI2";
/* Keeping ACPI device name coherent with ec.asl */
case PCI_DEVFN_ESPI: return "LPCB";
case PCI_DEVFN_HDA: return "HDAS";
diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c
index e030948..f77182a 100644
--- a/src/soc/intel/meteorlake/fsp_params.c
+++ b/src/soc/intel/meteorlake/fsp_params.c
@@ -59,6 +59,7 @@
static const pci_devfn_t gspi_dev[] = {
PCI_DEVFN_GSPI0,
PCI_DEVFN_GSPI1,
+ PCI_DEVFN_GSPI2,
};
static const pci_devfn_t uart_dev[] = {
diff --git a/src/soc/intel/meteorlake/gspi.c b/src/soc/intel/meteorlake/gspi.c
index 2a34ab6..387d3e3 100644
--- a/src/soc/intel/meteorlake/gspi.c
+++ b/src/soc/intel/meteorlake/gspi.c
@@ -10,6 +10,8 @@
return PCI_DEVFN_GSPI0;
case 1:
return PCI_DEVFN_GSPI1;
+ case 2:
+ return PCI_DEVFN_GSPI2;
}
return -1;
}
diff --git a/src/soc/intel/meteorlake/include/soc/pci_devs.h b/src/soc/intel/meteorlake/include/soc/pci_devs.h
index b139da4..701faf9 100644
--- a/src/soc/intel/meteorlake/include/soc/pci_devs.h
+++ b/src/soc/intel/meteorlake/include/soc/pci_devs.h
@@ -84,8 +84,10 @@
#define PCI_DEV_SLOT_ISH 0x12
#define PCI_DEVFN_ISH _PCI_DEVFN(ISH, 0)
+#define PCI_DEVFN_GSPI2 _PCI_DEVFN(ISH, 6)
#define PCI_DEVFN_UFS _PCI_DEVFN(ISH, 7)
#define PCI_DEV_ISH _PCI_DEV(ISH, 0)
+#define PCI_DEV_GSPI2 _PCI_DEV(ISH, 6)
#define PCI_DEV_UFS _PCI_DEV(ISH, 7)
#define PCI_DEV_SLOT_IOE 0x13
diff --git a/src/soc/intel/meteorlake/spi.c b/src/soc/intel/meteorlake/spi.c
index f2e3400..a31dc4c 100644
--- a/src/soc/intel/meteorlake/spi.c
+++ b/src/soc/intel/meteorlake/spi.c
@@ -15,6 +15,8 @@
return 1;
case PCI_DEVFN_GSPI1:
return 2;
+ case PCI_DEVFN_GSPI2:
+ return 3;
}
return -1;
}