device: Use pcidev_on_root()
Change-Id: Icf34b39d80f6e46d32a39b68f38fb2752c0bcebc
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/26484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c
index ab58c94..7de39d1 100644
--- a/src/northbridge/intel/x4x/northbridge.c
+++ b/src/northbridge/intel/x4x/northbridge.c
@@ -45,7 +45,7 @@
pci_domain_read_resources(dev);
- struct device *mch = dev_find_slot(0, PCI_DEVFN(0, 0));
+ struct device *mch = pcidev_on_root(0, 0);
/* Top of Upper Usable DRAM, including remap */
touud = pci_read_config16(mch, D0F0_TOUUD);
@@ -174,7 +174,7 @@
void northbridge_write_smram(u8 smram)
{
- struct device *dev = dev_find_slot(0, PCI_DEVFN(0, 0));
+ struct device *dev = pcidev_on_root(0, 0);
if (dev == NULL)
die("could not find pci 00:00.0!\n");
@@ -266,7 +266,7 @@
}
for (; fn >= 0; --fn) {
const struct device *const d =
- dev_find_slot(0, PCI_DEVFN(dev, fn));
+ pcidev_on_root(dev, fn);
if (!d || d->enabled)
continue;
const u32 deven = pci_read_config32(d0f0, D0F0_DEVEN);