nb/intel/i945: Initialize console in bootblock
Change-Id: Ic6ea158714998195614a63ee46a057f405de5616
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36796
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
diff --git a/src/ec/lenovo/pmh7/Makefile.inc b/src/ec/lenovo/pmh7/Makefile.inc
index d5524dc..c7c95c0 100644
--- a/src/ec/lenovo/pmh7/Makefile.inc
+++ b/src/ec/lenovo/pmh7/Makefile.inc
@@ -1,5 +1,6 @@
ifeq ($(CONFIG_EC_LENOVO_PMH7),y)
+bootblock-y += pmh7.c
ramstage-y += pmh7.c
smm-y += pmh7.c
romstage-y += pmh7.c
diff --git a/src/mainboard/apple/macbook21/Makefile.inc b/src/mainboard/apple/macbook21/Makefile.inc
index 3dae61e..b4f8b65 100644
--- a/src/mainboard/apple/macbook21/Makefile.inc
+++ b/src/mainboard/apple/macbook21/Makefile.inc
@@ -1 +1,3 @@
romstage-y += gpio.c
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/apple/macbook21/romstage.c b/src/mainboard/apple/macbook21/early_init.c
similarity index 100%
rename from src/mainboard/apple/macbook21/romstage.c
rename to src/mainboard/apple/macbook21/early_init.c
diff --git a/src/mainboard/asus/p5gc-mx/Makefile.inc b/src/mainboard/asus/p5gc-mx/Makefile.inc
index f3d7e76..a34f3f3 100644
--- a/src/mainboard/asus/p5gc-mx/Makefile.inc
+++ b/src/mainboard/asus/p5gc-mx/Makefile.inc
@@ -1,2 +1,4 @@
ramstage-y += cstates.c
romstage-y += gpio.c
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/asus/p5gc-mx/romstage.c b/src/mainboard/asus/p5gc-mx/early_init.c
similarity index 97%
rename from src/mainboard/asus/p5gc-mx/romstage.c
rename to src/mainboard/asus/p5gc-mx/early_init.c
index eef603b..6d37fed 100644
--- a/src/mainboard/asus/p5gc-mx/romstage.c
+++ b/src/mainboard/asus/p5gc-mx/early_init.c
@@ -15,6 +15,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <stdint.h>
#include <cf9_reset.h>
#include <device/pnp_ops.h>
@@ -111,7 +112,7 @@
}
}
-void mainboard_superio_config(void)
+void bootblock_mainboard_early_init(void)
{
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
}
diff --git a/src/mainboard/getac/p470/Makefile.inc b/src/mainboard/getac/p470/Makefile.inc
index ed9d39c..c8c8e0c 100644
--- a/src/mainboard/getac/p470/Makefile.inc
+++ b/src/mainboard/getac/p470/Makefile.inc
@@ -15,3 +15,5 @@
ramstage-y += cstates.c
romstage-y += gpio.c
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/early_init.c
similarity index 98%
rename from src/mainboard/getac/p470/romstage.c
rename to src/mainboard/getac/p470/early_init.c
index 2da9d06..3684c1c 100644
--- a/src/mainboard/getac/p470/romstage.c
+++ b/src/mainboard/getac/p470/early_init.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <stdint.h>
#include <arch/io.h>
#include <delay.h>
@@ -75,7 +76,7 @@
outb(0xaa, port);
}
-void mainboard_superio_config(void)
+void bootblock_mainboard_early_init(void)
{
pnp_devfn_t dev;
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/Makefile.inc b/src/mainboard/gigabyte/ga-945gcm-s2l/Makefile.inc
index f3d7e76..a34f3f3 100644
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/Makefile.inc
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/Makefile.inc
@@ -1,2 +1,4 @@
ramstage-y += cstates.c
romstage-y += gpio.c
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c b/src/mainboard/gigabyte/ga-945gcm-s2l/early_init.c
similarity index 95%
rename from src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
rename to src/mainboard/gigabyte/ga-945gcm-s2l/early_init.c
index 467a66f..7b82059 100644
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/early_init.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <superio/ite/it8718f/it8718f.h>
#include <superio/ite/common/ite.h>
#include <northbridge/intel/i945/i945.h>
@@ -24,7 +25,7 @@
#define EC_DEV PNP_DEV(0x2e, IT8718F_EC)
#define SUPERIO_DEV PNP_DEV(0x2e, 0)
-void mainboard_superio_config(void)
+void bootblock_mainboard_early_init(void)
{
/* Set default GPIOs on superio */
ite_reg_write(GPIO_DEV, 0x25, 0x40);
diff --git a/src/mainboard/ibase/mb899/Makefile.inc b/src/mainboard/ibase/mb899/Makefile.inc
index 3f072f5..992c373 100644
--- a/src/mainboard/ibase/mb899/Makefile.inc
+++ b/src/mainboard/ibase/mb899/Makefile.inc
@@ -1,3 +1,5 @@
ramstage-y += superio_hwm.c
ramstage-y += cstates.c
romstage-y += gpio.c
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/early_init.c
similarity index 97%
rename from src/mainboard/ibase/mb899/romstage.c
rename to src/mainboard/ibase/mb899/early_init.c
index 2bc3cde..ba8d30c 100644
--- a/src/mainboard/ibase/mb899/romstage.c
+++ b/src/mainboard/ibase/mb899/early_init.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <stdint.h>
#include <device/pnp_ops.h>
#include <cpu/x86/lapic.h>
@@ -29,7 +30,7 @@
* Also set up the GPIOs from the beginning. This is the "no schematic
* but safe anyways" method.
*/
-void mainboard_superio_config(void)
+void bootblock_mainboard_early_init(void)
{
pnp_devfn_t dev;
diff --git a/src/mainboard/intel/d945gclf/Makefile.inc b/src/mainboard/intel/d945gclf/Makefile.inc
index f3d7e76..a34f3f3 100644
--- a/src/mainboard/intel/d945gclf/Makefile.inc
+++ b/src/mainboard/intel/d945gclf/Makefile.inc
@@ -1,2 +1,4 @@
ramstage-y += cstates.c
romstage-y += gpio.c
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/early_init.c
similarity index 94%
rename from src/mainboard/intel/d945gclf/romstage.c
rename to src/mainboard/intel/d945gclf/early_init.c
index 7a8f5d1..c8dd361 100644
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/early_init.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <superio/smsc/lpc47m15x/lpc47m15x.h>
#include <northbridge/intel/i945/i945.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
@@ -39,7 +40,7 @@
// RCBA32(0x341c) = 0x00000001;
}
-void mainboard_superio_config(void)
+void bootblock_mainboard_early_init(void)
{
/* Enable SuperIO PM */
lpc47m15x_enable_serial(PME_DEV, 0x680);
diff --git a/src/mainboard/kontron/986lcd-m/Makefile.inc b/src/mainboard/kontron/986lcd-m/Makefile.inc
index f3d7e76..a34f3f3 100644
--- a/src/mainboard/kontron/986lcd-m/Makefile.inc
+++ b/src/mainboard/kontron/986lcd-m/Makefile.inc
@@ -1,2 +1,4 @@
ramstage-y += cstates.c
romstage-y += gpio.c
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/early_init.c
similarity index 98%
rename from src/mainboard/kontron/986lcd-m/romstage.c
rename to src/mainboard/kontron/986lcd-m/early_init.c
index 2c89453..48fe493 100644
--- a/src/mainboard/kontron/986lcd-m/romstage.c
+++ b/src/mainboard/kontron/986lcd-m/early_init.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <device/pci_ops.h>
#include <device/pnp_ops.h>
#include <device/pnp_def.h>
@@ -41,7 +42,7 @@
* the two. Also set up the GPIOs from the beginning. This is the "no schematic
* but safe anyways" method.
*/
-void mainboard_superio_config(void)
+void bootblock_mainboard_early_init(void)
{
pnp_devfn_t dev;
diff --git a/src/mainboard/lenovo/t60/Makefile.inc b/src/mainboard/lenovo/t60/Makefile.inc
index f646af8..b604b6b 100644
--- a/src/mainboard/lenovo/t60/Makefile.inc
+++ b/src/mainboard/lenovo/t60/Makefile.inc
@@ -14,5 +14,9 @@
##
smm-y += dock.c
+bootblock-y += dock.c
romstage-y += dock.c
+bootblock-y += gpio.c
romstage-y += gpio.c
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/early_init.c
similarity index 96%
rename from src/mainboard/lenovo/t60/romstage.c
rename to src/mainboard/lenovo/t60/early_init.c
index 5076ada..d3de1e4 100644
--- a/src/mainboard/lenovo/t60/romstage.c
+++ b/src/mainboard/lenovo/t60/early_init.c
@@ -15,6 +15,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <delay.h>
#include <stdint.h>
#include <device/pnp_ops.h>
@@ -48,7 +49,7 @@
pnp_set_enable(dev, 1);
}
-void mainboard_superio_config(void)
+void bootblock_mainboard_early_init(void)
{
/* Set up GPIO's early since it is needed for dock init */
i82801gx_setup_bars();
diff --git a/src/mainboard/lenovo/x60/Makefile.inc b/src/mainboard/lenovo/x60/Makefile.inc
index a7ad539..7fb2f02 100644
--- a/src/mainboard/lenovo/x60/Makefile.inc
+++ b/src/mainboard/lenovo/x60/Makefile.inc
@@ -14,6 +14,10 @@
##
smm-y += dock.c
+bootblock-y += dock.c
romstage-y += dock.c
ramstage-y += dock.c
+bootblock-y += gpio.c
romstage-y += gpio.c
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/early_init.c
similarity index 96%
rename from src/mainboard/lenovo/x60/romstage.c
rename to src/mainboard/lenovo/x60/early_init.c
index d230aa3..459c246 100644
--- a/src/mainboard/lenovo/x60/romstage.c
+++ b/src/mainboard/lenovo/x60/early_init.c
@@ -15,6 +15,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <delay.h>
#include <stdint.h>
#include <device/pnp_def.h>
@@ -48,7 +49,7 @@
pnp_set_enable(dev, 1);
}
-void mainboard_superio_config(void)
+void bootblock_mainboard_early_init(void)
{
/* Set up GPIO's early since it is needed for dock init */
i82801gx_setup_bars();
diff --git a/src/mainboard/roda/rk886ex/Makefile.inc b/src/mainboard/roda/rk886ex/Makefile.inc
index 2c68d38..ab01167 100644
--- a/src/mainboard/roda/rk886ex/Makefile.inc
+++ b/src/mainboard/roda/rk886ex/Makefile.inc
@@ -16,3 +16,5 @@
ramstage-y += m3885.c
ramstage-y += cstates.c
romstage-y += gpio.c
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/early_init.c
similarity index 97%
rename from src/mainboard/roda/rk886ex/romstage.c
rename to src/mainboard/roda/rk886ex/early_init.c
index 388c61a..dff1a6f 100644
--- a/src/mainboard/roda/rk886ex/romstage.c
+++ b/src/mainboard/roda/rk886ex/early_init.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <stdint.h>
#include <arch/io.h>
#include <cf9_reset.h>
@@ -54,7 +55,7 @@
outb(0xaa, port);
}
-void mainboard_superio_config(void)
+void bootblock_mainboard_early_init(void)
{
pnp_devfn_t dev;
diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
index 5aa004d..a0550ec 100644
--- a/src/northbridge/intel/i945/Kconfig
+++ b/src/northbridge/intel/i945/Kconfig
@@ -28,7 +28,6 @@
select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
select PARALLEL_MP
select C_ENVIRONMENT_BOOTBLOCK
- select NO_BOOTBLOCK_CONSOLE
config NORTHBRIDGE_INTEL_SUBTYPE_I945GC
def_bool n
diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h
index e9e6f4d..82f80ff 100644
--- a/src/northbridge/intel/i945/i945.h
+++ b/src/northbridge/intel/i945/i945.h
@@ -378,8 +378,6 @@
/* Romstage mainboard callbacks */
/* Optional: Override the default LPC config. */
void mainboard_lpc_decode(void);
-/* Optional: Initialize the superio for serial output. */
-void mainboard_superio_config(void);
/* Optional: mainboard specific init after console init and before raminit. */
void mainboard_pre_raminit_config(int s3_resume);
/* Mainboard specific RCBA init. Happens after raminit. */
diff --git a/src/northbridge/intel/i945/romstage.c b/src/northbridge/intel/i945/romstage.c
index c11a78a..4795881 100644
--- a/src/northbridge/intel/i945/romstage.c
+++ b/src/northbridge/intel/i945/romstage.c
@@ -28,10 +28,6 @@
{
}
-__weak void mainboard_superio_config(void)
-{
-}
-
__weak void mainboard_pre_raminit_config(int s3_resume)
{
}
@@ -51,12 +47,7 @@
enable_lapic();
- i82801gx_lpc_setup();
mainboard_lpc_decode();
- mainboard_superio_config();
-
- /* Set up the console */
- console_init();
if (MCHBAR16(SSKPD) == 0xCAFE) {
system_reset();
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc
index 68e423a..9ff0ebc 100644
--- a/src/southbridge/intel/common/Makefile.inc
+++ b/src/southbridge/intel/common/Makefile.inc
@@ -32,6 +32,7 @@
romstage-$(CONFIG_USBDEBUG) += usb_debug.c
ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
+bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c
smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c