soc/intel/alderlake: Add Acoustic noise mitigation UPDs
This patch expose the following FSP UPD interface into coreboot:
- AcousticNoiseMitigation
- FastPkgCRampDisable
- SlowSlewRate
BUG=b:204009588
TEST=build
Change-Id: I0b9c18f9b40d30525028e64754dd1dc86c3b2ec6
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58944
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h
index d259442..78f639c 100644
--- a/src/soc/intel/alderlake/chip.h
+++ b/src/soc/intel/alderlake/chip.h
@@ -151,6 +151,21 @@
FIVR_SS_6 = 44,
};
+/*
+ * Slew Rate configuration for Deep Package C States for VR domain.
+ * They are fast time divided by 2.
+ * 0 - Fast/2
+ * 1 - Fast/4
+ * 2 - Fast/8
+ * 3 - Fast/16
+ */
+enum slew_rate {
+ SLEW_FAST_2,
+ SLEW_FAST_4,
+ SLEW_FAST_8,
+ SLEW_FAST_16
+};
+
struct soc_intel_alderlake_config {
/* Common struct containing soc config data required by common code */
@@ -528,6 +543,15 @@
* 0.5% = 0, 1% = 3, 1.5% = 8, 2% = 18, 3% = 28, 4% = 34, 5% = 39, 6% = 44.
*/
uint8_t FivrSpreadSpectrum;
+ /* Enable or Disable Acoustic Noise Mitigation feature */
+ uint8_t AcousticNoiseMitigation;
+ /* Disable Fast Slew Rate for Deep Package C States for VR domains */
+ uint8_t FastPkgCRampDisable[NUM_VR_DOMAINS];
+ /*
+ * Slew Rate configuration for Deep Package C States for VR domains
+ * 0: Fast/2, 1: Fast/4, 2: Fast/8, 3: Fast/16; see enum slew_rate for values
+ */
+ uint8_t SlowSlewRate[NUM_VR_DOMAINS];
};
typedef struct soc_intel_alderlake_config config_t;