mb/google/cherry: Use common mtk_display_init()

TEST=check FW screen on dojo

Change-Id: Ie870899226588ac2a2e80f77e434455f4913d387
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79778
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
diff --git a/src/mainboard/google/cherry/mainboard.c b/src/mainboard/google/cherry/mainboard.c
index c1593ca..0e78f62 100644
--- a/src/mainboard/google/cherry/mainboard.c
+++ b/src/mainboard/google/cherry/mainboard.c
@@ -7,13 +7,10 @@
 #include <device/device.h>
 #include <device/mmio.h>
 #include <ec/google/chromeec/ec.h>
-#include <edid.h>
-#include <framebuffer_info.h>
 #include <gpio.h>
 #include <soc/bl31.h>
-#include <soc/ddp.h>
+#include <soc/display.h>
 #include <soc/dpm.h>
-#include <soc/dptx.h>
 #include <soc/i2c.h>
 #include <soc/msdc.h>
 #include <soc/mtcmos.h>
@@ -58,7 +55,7 @@
 }
 
 /* Set up backlight control pins as output pin and power-off by default */
-static void configure_panel_backlight(void)
+static void configure_backlight(void)
 {
 	gpio_output(GPIO_AP_EDP_BKLTEN, 0);
 	gpio_output(GPIO_BL_PWM_1V8, 0);
@@ -72,41 +69,16 @@
 	gpio_output(GPIO_EN_PP3300_DISP_X, 1);
 }
 
-static bool configure_display(void)
+static struct panel_description panel = {
+	.configure_backlight = configure_backlight,
+	.power_on = power_on_panel,
+	.disp_path = DISP_PATH_EDP,
+	.orientation = LB_FB_ORIENTATION_NORMAL,
+};
+
+struct panel_description *get_active_panel(void)
 {
-	struct edid edid;
-	struct fb_info *info;
-	const char *name;
-
-	printk(BIOS_INFO, "%s: Starting display initialization\n", __func__);
-
-	mtcmos_display_power_on();
-	mtcmos_protect_display_bus();
-	configure_panel_backlight();
-	power_on_panel();
-
-	mtk_ddp_init();
-	mdelay(200);
-
-	if (mtk_edp_init(&edid) < 0) {
-		printk(BIOS_ERR, "%s: Failed to initialize eDP\n", __func__);
-		return false;
-	}
-	name = edid.ascii_string;
-	if (name[0] == '\0')
-		name = "unknown name";
-	printk(BIOS_INFO, "%s: '%s %s' %dx%d@%dHz\n", __func__,
-	       edid.manufacturer_name, name, edid.mode.ha, edid.mode.va,
-	       edid.mode.refresh);
-
-	edid_set_framebuffer_bits_per_pixel(&edid, 32, 0);
-
-	mtk_ddp_mode_set(&edid);
-	info = fb_new_framebuffer_info_from_edid(&edid, (uintptr_t)0);
-	if (info)
-		fb_set_orientation(info, LB_FB_ORIENTATION_NORMAL);
-
-	return true;
+	return &panel;
 }
 
 static void configure_i2s(void)
@@ -133,7 +105,7 @@
 static void mainboard_init(struct device *dev)
 {
 	if (display_init_required())
-		configure_display();
+		mtk_display_init();
 	else
 		printk(BIOS_INFO, "%s: Skipped display initialization\n", __func__);
 
diff --git a/src/soc/mediatek/common/display.c b/src/soc/mediatek/common/display.c
index d51151e..a5b0e6b 100644
--- a/src/soc/mediatek/common/display.c
+++ b/src/soc/mediatek/common/display.c
@@ -43,6 +43,13 @@
 	return -1;
 }
 
+__weak int mtk_dsi_init(u32 mode_flags, u32 format, u32 lanes,
+			const struct edid *edid, const u8 *init_commands)
+{
+	printk(BIOS_WARNING, "%s: Not supported\n", __func__);
+	return -1;
+}
+
 int mtk_display_init(void)
 {
 	struct edid edid;
diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc
index 73ea6fa..56a10bc 100644
--- a/src/soc/mediatek/mt8195/Makefile.inc
+++ b/src/soc/mediatek/mt8195/Makefile.inc
@@ -45,6 +45,7 @@
 ramstage-y += ../common/ddp.c ddp.c
 ramstage-y += ../common/devapc.c devapc.c
 ramstage-y += ../common/dfd.c
+ramstage-y += ../common/display.c
 ramstage-y += ../common/dpm.c
 ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c
 ramstage-y += ../common/dp/dp_intf.c ../common/dp/dptx.c ../common/dp/dptx_hal.c dp_intf.c
diff --git a/src/soc/mediatek/mt8195/ddp.c b/src/soc/mediatek/mt8195/ddp.c
index 6277fa4..2bd95a2 100644
--- a/src/soc/mediatek/mt8195/ddp.c
+++ b/src/soc/mediatek/mt8195/ddp.c
@@ -150,7 +150,7 @@
 	write32((void *)(SMI_LARB0 + SMI_LARB_PORT_L0_OVL_RDMA0), 0);
 }
 
-void mtk_ddp_mode_set(const struct edid *edid)
+void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path)
 {
 	u32 fmt = OVL_INFMT_RGBA8888;
 	u32 bpp = edid->framebuffer_bits_per_pixel / 8;
diff --git a/src/soc/mediatek/mt8195/include/soc/ddp.h b/src/soc/mediatek/mt8195/include/soc/ddp.h
index 3394490..52bf9ae 100644
--- a/src/soc/mediatek/mt8195/include/soc/ddp.h
+++ b/src/soc/mediatek/mt8195/include/soc/ddp.h
@@ -5,6 +5,7 @@
 
 #include <soc/addressmap.h>
 #include <soc/ddp_common.h>
+#include <soc/display.h>
 #include <types.h>
 
 #define MAIN_PATH_OVL_NR 2
@@ -366,7 +367,4 @@
 	SMI_LARB_PORT_L0_OVL_RDMA0	= 0x388,
 };
 
-void mtk_ddp_init(void);
-void mtk_ddp_mode_set(const struct edid *edid);
-
 #endif
diff --git a/src/soc/mediatek/mt8195/include/soc/dsi.h b/src/soc/mediatek/mt8195/include/soc/dsi.h
new file mode 100644
index 0000000..0fd65b9
--- /dev/null
+++ b/src/soc/mediatek/mt8195/include/soc/dsi.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef SOC_MEDIATEK_MT8195_DSI_H
+#define SOC_MEDIATEK_MT8195_DSI_H
+
+#include <soc/dsi_common.h>
+
+#endif