commit c4b3903361c4d13242850e99cc382e101f70dccb
author Kyösti Mälkki <kyosti.malkki@gmail.com> Sun Feb 14 14:01:55 2021 +0200
committer Patrick Georgi <pgeorgi@google.com> Tue Feb 16 08:07:52 2021 +0000
tree c9ae4472a2a78a435312f62dd45ab4662aa15f8c
parent 4ef37ae68d14e91eca5ca08fe4b7b9df970e1fbe

soc/intel: Drop aliases on MMCONF_BASE_ADDRESS

Change-Id: I5ba60c1d8c314d37b4ef71c4613e6e0629da8149
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50662
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

src/soc/intel/alderlake/include/soc/iomap.h

diff --git a/src/soc/intel/alderlake/include/soc/iomap.h b/src/soc/intel/alderlake/include/soc/iomap.h
index 88fab6f..23b7c5b 100644
--- a/src/soc/intel/alderlake/include/soc/iomap.h
+++ b/src/soc/intel/alderlake/include/soc/iomap.h
@@ -12,9 +12,6 @@
 /*
  * Memory-mapped I/O registers.
  */
-#define MCFG_BASE_ADDRESS	CONFIG_MMCONF_BASE_ADDRESS
-#define MCFG_BASE_SIZE		0x4000000
-
 #define PCH_PRESERVED_BASE_ADDRESS	0xfc800000
 #define PCH_PRESERVED_BASE_SIZE	0x02000000
 

src/soc/intel/cannonlake/include/soc/iomap.h

diff --git a/src/soc/intel/cannonlake/include/soc/iomap.h b/src/soc/intel/cannonlake/include/soc/iomap.h
index dc07089..e09cec2 100644
--- a/src/soc/intel/cannonlake/include/soc/iomap.h
+++ b/src/soc/intel/cannonlake/include/soc/iomap.h
@@ -6,9 +6,6 @@
 /*
  * Memory-mapped I/O registers.
  */
-#define MCFG_BASE_ADDRESS	CONFIG_MMCONF_BASE_ADDRESS
-#define MCFG_BASE_SIZE		0x4000000
-
 #define PCH_PRESERVED_BASE_ADDRESS	0xfc800000
 #define PCH_PRESERVED_BASE_SIZE	0x02000000
 

src/soc/intel/elkhartlake/include/soc/iomap.h

diff --git a/src/soc/intel/elkhartlake/include/soc/iomap.h b/src/soc/intel/elkhartlake/include/soc/iomap.h
index 0246673..dbbd229 100644
--- a/src/soc/intel/elkhartlake/include/soc/iomap.h
+++ b/src/soc/intel/elkhartlake/include/soc/iomap.h
@@ -6,9 +6,6 @@
 /*
  * Memory-mapped I/O registers.
  */
-#define MCFG_BASE_ADDRESS	CONFIG_MMCONF_BASE_ADDRESS
-#define MCFG_BASE_SIZE		0x4000000
-
 #define PCH_PRESERVED_BASE_ADDRESS	0xfc800000
 #define PCH_PRESERVED_BASE_SIZE	0x02000000
 

src/soc/intel/icelake/include/soc/iomap.h

diff --git a/src/soc/intel/icelake/include/soc/iomap.h b/src/soc/intel/icelake/include/soc/iomap.h
index 6b82c19..cee9411 100644
--- a/src/soc/intel/icelake/include/soc/iomap.h
+++ b/src/soc/intel/icelake/include/soc/iomap.h
@@ -6,9 +6,6 @@
 /*
  * Memory-mapped I/O registers.
  */
-#define MCFG_BASE_ADDRESS	CONFIG_MMCONF_BASE_ADDRESS
-#define MCFG_BASE_SIZE		0x4000000
-
 #define PCH_PRESERVED_BASE_ADDRESS	0xfc800000
 #define PCH_PRESERVED_BASE_SIZE	0x02000000
 

src/soc/intel/jasperlake/include/soc/iomap.h

diff --git a/src/soc/intel/jasperlake/include/soc/iomap.h b/src/soc/intel/jasperlake/include/soc/iomap.h
index 79ffe29..eece24a 100644
--- a/src/soc/intel/jasperlake/include/soc/iomap.h
+++ b/src/soc/intel/jasperlake/include/soc/iomap.h
@@ -6,9 +6,6 @@
 /*
  * Memory-mapped I/O registers.
  */
-#define MCFG_BASE_ADDRESS	CONFIG_MMCONF_BASE_ADDRESS
-#define MCFG_BASE_SIZE		0x4000000
-
 #define PCH_PRESERVED_BASE_ADDRESS	0xfc800000
 #define PCH_PRESERVED_BASE_SIZE	0x02000000
 

src/soc/intel/tigerlake/include/soc/iomap.h

diff --git a/src/soc/intel/tigerlake/include/soc/iomap.h b/src/soc/intel/tigerlake/include/soc/iomap.h
index 6fa29d3..cdd370b 100644
--- a/src/soc/intel/tigerlake/include/soc/iomap.h
+++ b/src/soc/intel/tigerlake/include/soc/iomap.h
@@ -12,9 +12,6 @@
 /*
  * Memory-mapped I/O registers.
  */
-#define MCFG_BASE_ADDRESS	CONFIG_MMCONF_BASE_ADDRESS
-#define MCFG_BASE_SIZE		0x4000000
-
 #define PCH_PRESERVED_BASE_ADDRESS	0xfc800000
 #define PCH_PRESERVED_BASE_SIZE	0x02000000