tree b627535399a7341925be6a3e4e60516df9a15f1f
parent 76619b01c84ba2db62310da311de4cf8271154f9
author Matt Papageorge <matthewpapa07@gmail.com> 1620939597 -0500
committer Patrick Georgi <pgeorgi@google.com> 1621578917 +0000

mb/google/guybrush: Enable some PCIe power saving features

Enable ASPM, Common Clock and Clock Power Managment. Accomplish this
by adding the options in the platform Kconfig as well as dxio
descriptors.

BUG=b:187743927
TEST=Boot to ChromeOS and see ASPM, CC and Clock PM enabled with lspci

Change-Id: Iefc4b5b489cb8caf59f21dd4333d7af66ba47c32
Signed-off-by: Matt Papageorge <matthewpapa07@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54282
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>