cpu/amd/mtrr: Remove topmem global variables
The comments are not correct anymore. With AGESA there is no need to
synchronize TOM_MEMx msr's between AP's. It's also not the best place
to do so anyway.
Change-Id: Iecbe1553035680b7c3780338070b852606d74d15
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58693
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c
index 5cc52b6..666deda 100644
--- a/src/soc/amd/stoneyridge/chip.c
+++ b/src/soc/amd/stoneyridge/chip.c
@@ -131,7 +131,6 @@
static void soc_init(void *chip_info)
{
fch_init(chip_info);
- setup_bsp_ramtop();
}
static void soc_final(void *chip_info)
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index d5231ad..5d5ed7a 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -332,7 +332,7 @@
*/
void amd_initcpuio(void)
{
- uintptr_t topmem = bsp_topmem();
+ uintptr_t topmem = amd_topmem();
uintptr_t base, limit;
/* Enable legacy video routing: D18F1xF4 VGA Enable */