commit c3385070d6e86dbde71dddbdef94ffa5579f9d11
author Elyes HAOUAS <ehaouas@noos.fr> Thu Mar 21 15:38:06 2019 +0100
committer Nico Huber <nico.h@gmx.de> Fri Apr 26 16:49:13 2019 +0000
tree e2d65c2c0550b67092d008ca31c3c22e11b932f0
parent 9df72e0471296d9bc2981646490c1f8b5b1e54e0

soc/{amd,intel}/chip: Use local include for chip.h

Change-Id: Ic1fcbf4b54b7d0b5cda04ca9f7fc145050c867b8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32014
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

src/soc/amd/stoneyridge/chip.c

diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c
index 033af6e..7221f95 100644
--- a/src/soc/amd/stoneyridge/chip.c
+++ b/src/soc/amd/stoneyridge/chip.c
@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <chip.h>
 #include <bootstate.h>
 #include <console/console.h>
 #include <cpu/amd/mtrr.h>
@@ -30,6 +29,8 @@
 #include <amdblocks/agesawrapper.h>
 #include <amdblocks/agesawrapper_call.h>
 
+#include "chip.h"
+
 /* Supplied by i2c.c */
 extern struct device_operations stoneyridge_i2c_mmio_ops;
 extern const char *i2c_acpi_name(const struct device *dev);

src/soc/amd/stoneyridge/northbridge.c

diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index 9380d1f..42963c0 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -13,13 +13,11 @@
  * GNU General Public License for more details.
  */
 
-
 #include <device/pci_ops.h>
 #include <arch/ioapic.h>
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <cbmem.h>
-#include <chip.h>
 #include <console/console.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/x86/lapic_def.h>
@@ -42,6 +40,8 @@
 #include <string.h>
 #include <arch/bert_storage.h>
 
+#include "chip.h"
+
 static void set_io_addr_reg(struct device *dev, u32 nodeid, u32 linkn, u32 reg,
 			u32 io_min, u32 io_max)
 {

src/soc/amd/stoneyridge/romstage.c

diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index 92922c0..12ee2a8 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -24,7 +24,6 @@
 #include <commonlib/helpers.h>
 #include <console/console.h>
 #include <device/device.h>
-#include <chip.h>
 #include <program_loading.h>
 #include <romstage_handoff.h>
 #include <elog.h>
@@ -35,6 +34,8 @@
 #include <soc/southbridge.h>
 #include <amdblocks/psp.h>
 
+#include "chip.h"
+
 void __weak mainboard_romstage_entry(int s3_resume)
 {
 	/* By default, don't do anything */