Extend coreboot table entry for serial ports

Add information about memory mapped/io mapped base addresses.

and fix up libpayload to use the same structures

Signed-off-by: Stefan Reinauer <reinauer@google.com>

Change-Id: I5f7b5eda6063261b9acb7a46310172d4a5471dfb
Reviewed-on: http://review.coreboot.org/261
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
7 files changed