commit c2c8a743d1941998e6c316adec98947509ab387e
author Rizwan Qureshi <rizwan.qureshi@intel.com> Fri Jan 13 22:04:11 2017 +0530
committer Martin Roth <martinroth@google.com> Thu Feb 23 17:05:58 2017 +0100
tree 69d573e3c114f30ce364dba0e76d00a8899fb90d
parent 30d4604e5a33e735e59765ff94a61d78ca419654

soc/intel/skylake: Enable Systemagent IMGU

Camera and Imaging device should be enabled for camera usecase,
FSP provides a UPD to enable/disable the SA IMGU (Imaging Unit)
expose the same as a config option in devicetree.cb

Also remove a redundant assignment for PchCio2Enable.

BUG=None
BRANCH=None
TEST=lspci should list 00:05:00

Change-Id: I4cf7daf41bfaf4dcba414921cac2e7e12bf89f37
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/18365
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

src/soc/intel/skylake/chip_fsp20.c

diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index 2b50d0c..8b8c37c 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -174,6 +174,7 @@
 	       sizeof(params->SerialIoDevMode));
 
 	params->PchCio2Enable = config->Cio2Enable;
+	params->SaImguEnable = config->SaImguEnable;
 	params->Heci3Enabled = config->Heci3Enabled;
 
 	params->LogoPtr = config->LogoPtr;
@@ -186,7 +187,6 @@
 	params->PchPmLanWakeFromDeepSx = config->WakeConfigPcieWakeFromDeepSx;
 
 	params->PchLanEnable = config->EnableLan;
-	params->PchCio2Enable = config->Cio2Enable;
 	params->SataSalpSupport = config->SataSalpSupport;
 	params->SsicPortEnable = config->SsicPortEnable;
 	params->ScsEmmcEnabled = config->ScsEmmcEnabled;