diff --git a/src/southbridge/intel/i82801jx/sata.c b/src/southbridge/intel/i82801jx/sata.c
index b3bed1e..fa56654 100644
--- a/src/southbridge/intel/i82801jx/sata.c
+++ b/src/southbridge/intel/i82801jx/sata.c
@@ -15,8 +15,7 @@
 
 typedef struct southbridge_intel_i82801jx_config config_t;
 
-static void sata_enable_ahci_mmap(struct device *const dev, const u8 port_map,
-				  const int is_mobile)
+static void sata_enable_ahci_mmap(struct device *const dev, const u8 port_map)
 {
 	int i;
 	u32 reg32;
@@ -56,14 +55,12 @@
 
 	/* Lock R/WO bits in Port command registers. */
 	for (i = 0; i < 6; ++i) {
-		if (((i == 2) || (i == 3)) && is_mobile)
-			continue;
 		u8 *addr = abar + 0x118 + (i * 0x80);
 		write32(addr, read32(addr));
 	}
 }
 
-static void sata_program_indexed(struct device *const dev, const int is_mobile)
+static void sata_program_indexed(struct device *const dev)
 {
 	u32 reg32;
 
@@ -82,31 +79,25 @@
 	pci_write_config8(dev, D31F2_SIDX, 0x78);
 	pci_write_config8(dev, D31F2_SDAT + 2, 0x22);
 
-	if (!is_mobile) {
-		pci_write_config8(dev, D31F2_SIDX, 0x84);
-		reg32 = pci_read_config32(dev, D31F2_SDAT);
-		reg32 &= ~((7 << 3) | (7 << 0));
-		reg32 |= (3 << 3) | (3 << 0);
-		pci_write_config32(dev, D31F2_SDAT, reg32);
-	}
+	pci_write_config8(dev, D31F2_SIDX, 0x84);
+	reg32 = pci_read_config32(dev, D31F2_SDAT);
+	reg32 &= ~((7 << 3) | (7 << 0));
+	reg32 |= (3 << 3) | (3 << 0);
+	pci_write_config32(dev, D31F2_SDAT, reg32);
 
 	pci_write_config8(dev, D31F2_SIDX, 0x88);
 	reg32 = pci_read_config32(dev, D31F2_SDAT);
-	if (!is_mobile)
-		reg32 &= ~((7 << 27) | (7 << 24) | (7 << 11) | (7 << 8));
-	reg32 &= ~((7 << 19) | (7 << 16) | (7 << 3) | (7 << 0));
-	if (!is_mobile)
-		reg32 |= (4 << 27) | (4 << 24) | (2 << 11) | (2 << 8);
-	reg32 |= (4 << 19) | (4 << 16) | (2 << 3) | (2 << 0);
+	reg32 &= ~((7 << 27) | (7 << 24) | (7 << 11) | (7 << 8));
+	reg32 &= ~((7 << 19) | (7 << 16) | (7 <<  3) | (7 << 0));
+	reg32 |= (4 << 27) | (4 << 24) | (2 << 11) | (2 << 8);
+	reg32 |= (4 << 19) | (4 << 16) | (2 <<  3) | (2 << 0);
 	pci_write_config32(dev, D31F2_SDAT, reg32);
 
 	pci_write_config8(dev, D31F2_SIDX, 0x8c);
 	reg32 = pci_read_config32(dev, D31F2_SDAT);
-	if (!is_mobile)
-		reg32 &= ~((7 << 27) | (7 << 24));
+	reg32 &= ~((7 << 27) | (7 << 24));
 	reg32 &= ~((7 << 19) | (7 << 16) | 0xffff);
-	if (!is_mobile)
-		reg32 |= (2 << 27) | (2 << 24);
+	reg32 |= (2 << 27) | (2 << 24);
 	reg32 |= (2 << 19) | (2 << 16) | 0x00aa;
 	pci_write_config32(dev, D31F2_SDAT, reg32);
 
@@ -200,9 +191,9 @@
 	pci_write_config32(dev, 0x94, sclkcg);
 
 	if (sata_mode == 0)
-		sata_enable_ahci_mmap(dev, config->sata_port_map, 0);
+		sata_enable_ahci_mmap(dev, config->sata_port_map);
 
-	sata_program_indexed(dev, 0);
+	sata_program_indexed(dev);
 }
 
 static void sata_enable(struct device *dev)