tree 97e3232e79692f9f14fda9f48bf5065ec0eaba37
parent b26f0f924ab81e578bdbf725960e0d02643f972e
author Eric Lai <eric_lai@quanta.corp-partner.google.com> 1686551274 +0800
committer Felix Held <felix-coreboot@felixheld.de> 1687301713 +0000

arch/x86: Introduce DUMP_SMBIOS_TYPE17 config

DDR5 spd is not supported read by coreboot. But FSP can read it,
so print the memory information from smbios type17 dimm information.

TEST=check the coreboot log.
memory Channel-0-DIMM-0 type is DDR5
memory part number is MTC8C1084S1SC56BG1
memory max speed is 5600 MT/s
memory speed is 5200 MT/s
memory size is 16384 MiB

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I2b5ca1f4a59598531a6cba500672c2717f2a7b00
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75756
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>