blob: ed5cd8c1d41fcce6c6e6237158ccef425a5b233c [file] [log] [blame]
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* This file is part of the coreboot project. */
* A generic romstage (pre-ram) driver for Fintek variant Super I/O chips.
* The following is derived directly from the vendor Fintek's data-sheets:
* To toggle between `configuration mode` and `normal operation mode` as to
* manipulation the various LDN's in Fintek Super I/O's we are required to pass
* magic numbers `passwords keys`.
* FINTEK_ENTRY_KEY := enable configuration : 0x87
* FINTEK_EXIT_KEY := disable configuration : 0xAA
* To modify a LDN's configuration register, we use the index port to select
* the index of the LDN and then writing to the data port to alter the
* parameters. A default index, data port pair is 0x4E, 0x4F respectively, a
* user modified pair is 0x2E, 0x2F respectively.
#include <arch/io.h>
#include <device/pnp_ops.h>
#include <device/pnp.h>
#include <stdint.h>
#include "fintek.h"
#define FINTEK_ENTRY_KEY 0x87
/* Enable configuration: pass entry key '0x87' into index port dev. */
void pnp_enter_conf_state(pnp_devfn_t dev)
u16 port = dev >> 8;
outb(FINTEK_ENTRY_KEY, port);
outb(FINTEK_ENTRY_KEY, port);
/* Disable configuration: pass exit key '0xAA' into index port dev. */
void pnp_exit_conf_state(pnp_devfn_t dev)
u16 port = dev >> 8;
outb(FINTEK_EXIT_KEY, port);
/* Bring up early serial debugging output before the RAM is initialized. */
void fintek_enable_serial(pnp_devfn_t dev, u16 iobase)
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_enable(dev, 1);