drivers/gfx: Add generic graphics with SSDT generator

Adds a generic graphics driver that can be added to a devicetree which
populates graphics-related ACPI table. It will write the _DOD method
(Enumerate All Devices Attached to the Display Adapter) and a device
object for each device defined. The device may optionally have a
connected privacy screen which can be controlled with a _DSM.

chip drivers/generic/gfx
  register "device_count" = "1"
  register "device[0].name" = ""LCD""
  register "device[0].addr" = "0x0400"
  register "device[0].privacy.enabled" = "1"
  register "device[0].privacy.detect_function" = ""\\_SB.PCI0.PVSC.GPVD""
  register "device[0].privacy.status_function" = ""\\_SB.PCI0.PVSC.GPVX""
  register "device[0].privacy.enable_function" = ""\\_SB.PCI0.PVSC.EPVX""
  register "device[0].privacy.disable_function" = ""\\_SB.PCI0.PVSC.DPVX""
  device generic 0 on end

Scope (\_SB.PCI0.GFX0)
    Method (_DOD, 0, NotSerialized)  // _DOD: Display Output Devices
        Return (Package (0x01)

    Device (LCD)
        Name (_ADR, 0x0400)  // _ADR: Address
        Name (_STA, 0x0F)  // _STA: Status
        Method (_DSM, 4, Serialized)  // _DSM: Device-Specific Method
            ToBuffer (Arg0, Local0)
            If ((Local0 == ToUUID ("c7033113-8720-4ceb-9090-9d52b3e52d73")))
                ToInteger (Arg2, Local1)
                If ((Local1 == Zero))
                    Local2 = \_SB.PCI0.PVSC.GPVD ()
                    If ((Local2 == One))
                        Return (Buffer (One)

                If ((Local1 == One))
                    ToBuffer (\_SB.PCI0.PVSC.GPVX (), Local2)
                    Return (Local2)

                If ((Local1 == 0x02))
                    \_SB.PCI0.PVSC.EPVX ()

                If ((Local1 == 0x03))
                    \_SB.PCI0.PVSC.DPVX ()

                Return (Buffer (One)

            Return (Buffer (One)

TEST=Added gfx to devicetree on sarien_cml and correct ASL in SSDT

Change-Id: Ida520dd7aad81ee7c1e5f2d0d3f5cc1a766d78a0
Signed-off-by: Mathew King <>
Reviewed-by: Simon Glass <>
Tested-by: build bot (Jenkins) <>
4 files changed
tree: 6178eccbc6425766be7631fe57a59d2a1386d42c
  1. .checkpatch.conf
  2. .clang-format
  3. .editorconfig
  4. .gitignore
  5. .gitmodules
  6. .gitreview
  7. 3rdparty/
  10. Documentation/
  13. Makefile
  16. configs/
  17. gnat.adc
  18. payloads/
  19. src/
  21. util/

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.


After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)


  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

You can contact us directly on the coreboot mailing list:

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.