Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
8fcefd3f6f4991f3b6037f389e0252895a3ec03f
/
.
/
src
/
soc
/
amd
/
common
/
block
/
s3
/
Makefile.inc
blob: 03395eca9ccd707c163d5c159efea92cf2f93c41 [
file
] [
log
] [
blame
]
ifeq
(
$
(
CONFIG_SOC_AMD_COMMON_BLOCK_S3
),
y
)
romstage
-
y
+=
s3_resume
.
c
ramstage
-
y
+=
s3_resume
.
c
endif
# CONFIG_SOC_AMD_COMMON_BLOCK_S3