diff --git a/src/include/cpu/amd/msr.h b/src/include/cpu/amd/msr.h
index ccc9719..3f7febc 100644
--- a/src/include/cpu/amd/msr.h
+++ b/src/include/cpu/amd/msr.h
@@ -41,6 +41,7 @@
 #define PS_STS_REG			0xC0010063
 #define PSTATE_0_MSR			0xC0010064
 #define PSTATE_MSR(pstate)		(PSTATE_0_MSR + (pstate))
+#define PSTATE_MSR_COUNT		8
 
 #define MSR_PATCH_LOADER		0xC0010020
 
diff --git a/src/soc/amd/stoneyridge/pstate_util.c b/src/soc/amd/stoneyridge/pstate_util.c
index 12bc2b5..cd5878f 100644
--- a/src/soc/amd/stoneyridge/pstate_util.c
+++ b/src/soc/amd/stoneyridge/pstate_util.c
@@ -21,7 +21,7 @@
 	bool first = true;
 	uint32_t frequency_id;
 
-	for (i = 0; i < 8; i++) {
+	for (i = 0; i < PSTATE_MSR_COUNT; i++) {
 		pstate_reg.raw = rdmsr(PSTATE_MSR(i)).raw;
 
 		if (!pstate_reg.pstate_en)