commit | c045b099e460899a89c85727dda84a77e62fa072 | [log] [tgz] |
---|---|---|
author | Subrata Banik <subratabanik@google.com> | Mon Jan 03 19:35:35 2022 +0000 |
committer | Subrata Banik <subratabanik@google.com> | Wed Jan 05 06:30:40 2022 +0000 |
tree | ff70767a5220a3f968f524b63a7abe4459d19b61 | |
parent | 8b63dac06184e56ce40d82d982e983ac79163551 [diff] |
mb/starlabs/labtop: Replace leading whitespace with tab Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I4d7324148ba182d0317b1f64e39f04a8a55fe79b Reviewed-on: https://review.coreboot.org/c/coreboot/+/60733 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Sean Rhodes <admin@starlabs.systems> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
diff --git a/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb b/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb index 2e001c6..0b78914 100644 --- a/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb +++ b/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb
@@ -22,7 +22,7 @@ register "enable_c6dram" = "1" register "HeciEnabled" = "1" register "SaGv" = "SaGv_Enabled" - register "TcssD3ColdDisable" = "1" + register "TcssD3ColdDisable" = "1" # FSP Silicon # Serial I/O