src/sb: Use 'print("%s...", __func__)'

Change-Id: Ie0d845d3e501ed5ebeef1997944445d31768e410
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39373
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 0341de2..987db36 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -446,7 +446,7 @@
 {
 	const config_t *const config = dev->chip_info;
 
-	printk(BIOS_DEBUG, "pch_spi_init\n");
+	printk(BIOS_DEBUG, "%s\n", __func__);
 
 	if (config->spi_uvscc)
 		RCBA32(0x3800 + 0xc8) = config->spi_uvscc;
@@ -526,7 +526,7 @@
 
 static void lpc_init(struct device *dev)
 {
-	printk(BIOS_DEBUG, "pch: lpc_init\n");
+	printk(BIOS_DEBUG, "pch: %s\n", __func__);
 
 	/* Print detected platform */
 	report_pch_info(dev);
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index b69dba4..7e2b5a7 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -354,7 +354,7 @@
 
 static void lpc_init(struct device *dev)
 {
-	printk(BIOS_DEBUG, "i82801gx: lpc_init\n");
+	printk(BIOS_DEBUG, "i82801gx: %s\n", __func__);
 
 	/* Set the value for PCI command register. */
 	pci_write_config16(dev, PCI_COMMAND, 0x000f);
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index 455e3b8..37f9852 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -366,7 +366,7 @@
 
 static void lpc_init(struct device *dev)
 {
-	printk(BIOS_DEBUG, "i82801ix: lpc_init\n");
+	printk(BIOS_DEBUG, "i82801ix: %s\n", __func__);
 
 	/* Set the value for PCI command register. */
 	pci_write_config16(dev, PCI_COMMAND, 0x000f);
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index 73eaede..ae98fdd 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -371,7 +371,7 @@
 
 static void lpc_init(struct device *dev)
 {
-	printk(BIOS_DEBUG, "i82801jx: lpc_init\n");
+	printk(BIOS_DEBUG, "i82801jx: %s\n", __func__);
 
 	/* Set the value for PCI command register. */
 	pci_write_config16(dev, PCI_COMMAND, 0x000f);
diff --git a/src/southbridge/intel/i82870/ioapic.c b/src/southbridge/intel/i82870/ioapic.c
index 6be212f..4763703 100644
--- a/src/southbridge/intel/i82870/ioapic.c
+++ b/src/southbridge/intel/i82870/ioapic.c
@@ -72,13 +72,13 @@
 	*pWindowRegister = (*pWindowRegister & ~(0x0f << 24)) | apic_id;   // Set the ID
 
 	if ((*pWindowRegister & (0x0f << 24)) != apic_id)
-		die("p64h2_ioapic_init failed");
+		die("%s failed", __func__);
 
 	*pIndexRegister  = 3;   // Select Boot Configuration register
 	*pWindowRegister |= 1;  // Use Processor System Bus to deliver interrupts
 
 	if (!(*pWindowRegister & 1))
-		die("p64h2_ioapic_init failed");
+		die("%s failed", __func__);
 }
 
 static struct device_operations ioapic_ops = {
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index f1fa0d2..0d15b5d 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -441,7 +441,7 @@
 
 static void lpc_init(struct device *dev)
 {
-	printk(BIOS_DEBUG, "pch: lpc_init\n");
+	printk(BIOS_DEBUG, "pch: %s\n", __func__);
 
 	/* Set the value for PCI command register. */
 	pci_write_config16(dev, PCI_COMMAND, 0x000f);
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index 3535312..7e1355a 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -509,7 +509,7 @@
 
 static void lpc_init(struct device *dev)
 {
-	printk(BIOS_DEBUG, "pch: lpc_init\n");
+	printk(BIOS_DEBUG, "pch: %s\n", __func__);
 
 	/* Set the value for PCI command register. */
 	pci_write_config16(dev, PCI_COMMAND, 0x000f);