include/device/device.h: Remove CHIP_NAME() macro

Macros can be confusing on their own; hiding commas make things worse.
This can sometimes be downright misleading. A "good" example would be
the code in soc/intel/xeon_sp/spr/chip.c:

CHIP_NAME("Intel SapphireRapids-SP").enable_dev = chip_enable_dev,

This appears as CHIP_NAME() being some struct when in fact these are
defining 2 separate members of the same struct.

It was decided to remove this macro altogether, as it does not do
anything special and incurs a maintenance burden.

Change-Id: Iaed6dfb144bddcf5c43634b0c955c19afce388f0
Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80239
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Jakub Czapiga <czapiga@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
diff --git a/src/soc/intel/alderlake/chip.c b/src/soc/intel/alderlake/chip.c
index 0639157..45fb39f 100644
--- a/src/soc/intel/alderlake/chip.c
+++ b/src/soc/intel/alderlake/chip.c
@@ -286,7 +286,7 @@
 }
 
 struct chip_operations soc_intel_alderlake_ops = {
-	CHIP_NAME("Intel Alderlake")
+	.name = "Intel Alderlake",
 	.enable_dev	= &soc_enable,
 	.init		= &soc_init_pre_device,
 };
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 07c2637..469b9be 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -759,7 +759,7 @@
 }
 
 struct chip_operations soc_intel_apollolake_ops = {
-	CHIP_NAME("Intel Apollolake SOC")
+	.name = "Intel Apollolake SOC",
 	.enable_dev = &enable_dev,
 	.init = &soc_init,
 	.final = &soc_final
diff --git a/src/soc/intel/baytrail/chip.c b/src/soc/intel/baytrail/chip.c
index 592e178..fdfd129 100644
--- a/src/soc/intel/baytrail/chip.c
+++ b/src/soc/intel/baytrail/chip.c
@@ -43,7 +43,7 @@
 }
 
 struct chip_operations soc_intel_baytrail_ops = {
-	CHIP_NAME("Intel BayTrail SoC")
+	.name = "Intel BayTrail SoC",
 	.enable_dev = enable_dev,
 	.init = soc_init,
 };
diff --git a/src/soc/intel/braswell/chip.c b/src/soc/intel/braswell/chip.c
index d3c41f8..407b6ea 100644
--- a/src/soc/intel/braswell/chip.c
+++ b/src/soc/intel/braswell/chip.c
@@ -294,7 +294,7 @@
 }
 
 struct chip_operations soc_intel_braswell_ops = {
-	CHIP_NAME("Intel Braswell SoC")
+	.name = "Intel Braswell SoC",
 	.enable_dev = enable_dev,
 	.init       = soc_init,
 };
diff --git a/src/soc/intel/broadwell/northbridge.c b/src/soc/intel/broadwell/northbridge.c
index 6525275..3d2574b 100644
--- a/src/soc/intel/broadwell/northbridge.c
+++ b/src/soc/intel/broadwell/northbridge.c
@@ -419,6 +419,6 @@
 }
 
 struct chip_operations soc_intel_broadwell_ops = {
-	CHIP_NAME("Intel Broadwell")
+	.name = "Intel Broadwell",
 	.init       = &broadwell_init_pre_device,
 };
diff --git a/src/soc/intel/broadwell/pch/pch.c b/src/soc/intel/broadwell/pch/pch.c
index 98fbc46..ddb51cc 100644
--- a/src/soc/intel/broadwell/pch/pch.c
+++ b/src/soc/intel/broadwell/pch/pch.c
@@ -196,7 +196,7 @@
 }
 
 struct chip_operations soc_intel_broadwell_pch_ops = {
-	CHIP_NAME("Intel Broadwell PCH")
+	.name = "Intel Broadwell PCH",
 	.enable_dev = &broadwell_pch_enable_dev,
 };
 
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index 0da6e40..bda66bd 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -206,7 +206,7 @@
 }
 
 struct chip_operations soc_intel_cannonlake_ops = {
-	CHIP_NAME("Intel Cannonlake")
+	.name = "Intel Cannonlake",
 	.enable_dev	= &soc_enable,
 	.init		= &soc_init_pre_device,
 };
diff --git a/src/soc/intel/common/block/pcie/rtd3/rtd3.c b/src/soc/intel/common/block/pcie/rtd3/rtd3.c
index abd7e466..39c82b1 100644
--- a/src/soc/intel/common/block/pcie/rtd3/rtd3.c
+++ b/src/soc/intel/common/block/pcie/rtd3/rtd3.c
@@ -567,6 +567,6 @@
 }
 
 struct chip_operations soc_intel_common_block_pcie_rtd3_ops = {
-	CHIP_NAME("Intel PCIe Runtime D3")
+	.name = "Intel PCIe Runtime D3",
 	.enable_dev = pcie_rtd3_acpi_enable
 };
diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c
index 533fbee..c03f5a9 100644
--- a/src/soc/intel/common/block/uart/uart.c
+++ b/src/soc/intel/common/block/uart/uart.c
@@ -433,7 +433,7 @@
 }
 
 struct chip_operations soc_intel_common_block_uart_ops = {
-	CHIP_NAME("LPSS UART in ACPI mode")
+	.name = "LPSS UART in ACPI mode",
 	.enable_dev = uart_enable
 };
 
diff --git a/src/soc/intel/common/block/usb4/pcie.c b/src/soc/intel/common/block/usb4/pcie.c
index 0139647..f2414cc 100644
--- a/src/soc/intel/common/block/usb4/pcie.c
+++ b/src/soc/intel/common/block/usb4/pcie.c
@@ -81,6 +81,6 @@
 }
 
 struct chip_operations soc_intel_common_block_usb4_ops = {
-	CHIP_NAME("Intel USB4 PCIe Root Port")
+	.name = "Intel USB4 PCIe Root Port",
 	.enable_dev = usb4_pcie_acpi_enable
 };
diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c
index 1a4341e..1016460 100644
--- a/src/soc/intel/denverton_ns/chip.c
+++ b/src/soc/intel/denverton_ns/chip.c
@@ -187,7 +187,7 @@
 }
 
 struct chip_operations soc_intel_denverton_ns_ops = {
-	CHIP_NAME("Intel Denverton-NS SOC")
+	.name = "Intel Denverton-NS SOC",
 	.enable_dev = soc_enable_dev,
 	.init = soc_init,
 	.final = soc_final
diff --git a/src/soc/intel/elkhartlake/chip.c b/src/soc/intel/elkhartlake/chip.c
index 194591d..f9e4e0e 100644
--- a/src/soc/intel/elkhartlake/chip.c
+++ b/src/soc/intel/elkhartlake/chip.c
@@ -159,7 +159,7 @@
 }
 
 struct chip_operations soc_intel_elkhartlake_ops = {
-	CHIP_NAME("Intel Elkhartlake")
+	.name = "Intel Elkhartlake",
 	.enable_dev	= &soc_enable,
 	.init		= &soc_init_pre_device,
 };
diff --git a/src/soc/intel/jasperlake/chip.c b/src/soc/intel/jasperlake/chip.c
index c049163f..7b185c3 100644
--- a/src/soc/intel/jasperlake/chip.c
+++ b/src/soc/intel/jasperlake/chip.c
@@ -170,7 +170,7 @@
 }
 
 struct chip_operations soc_intel_jasperlake_ops = {
-	CHIP_NAME("Intel Jasperlake")
+	.name = "Intel Jasperlake",
 	.enable_dev	= &soc_enable,
 	.init		= &soc_init_pre_device,
 };
diff --git a/src/soc/intel/meteorlake/chip.c b/src/soc/intel/meteorlake/chip.c
index be957cc..03adfdb 100644
--- a/src/soc/intel/meteorlake/chip.c
+++ b/src/soc/intel/meteorlake/chip.c
@@ -276,7 +276,7 @@
 }
 
 struct chip_operations soc_intel_meteorlake_ops = {
-	CHIP_NAME("Intel Meteorlake")
+	.name = "Intel Meteorlake",
 	.enable_dev	= &soc_enable,
 	.init		= &soc_init_pre_device,
 	.final		= &soc_init_final_device,
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 8df1ad3..f471edb 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -212,7 +212,7 @@
 }
 
 struct chip_operations soc_intel_skylake_ops = {
-	CHIP_NAME("Intel 6th Gen")
+	.name = "Intel 6th Gen",
 	.enable_dev	= &soc_enable,
 	.init		= &soc_init_pre_device,
 };
diff --git a/src/soc/intel/tigerlake/chip.c b/src/soc/intel/tigerlake/chip.c
index dd24679..c94e727 100644
--- a/src/soc/intel/tigerlake/chip.c
+++ b/src/soc/intel/tigerlake/chip.c
@@ -222,7 +222,7 @@
 }
 
 struct chip_operations soc_intel_tigerlake_ops = {
-	CHIP_NAME("Intel Tigerlake")
+	.name = "Intel Tigerlake",
 	.enable_dev	= &soc_enable,
 	.init		= &soc_init_pre_device,
 };
diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c
index 39a7eba..1e84dd5 100644
--- a/src/soc/intel/xeon_sp/cpx/chip.c
+++ b/src/soc/intel/xeon_sp/cpx/chip.c
@@ -186,7 +186,7 @@
 }
 
 struct chip_operations soc_intel_xeon_sp_cpx_ops = {
-	CHIP_NAME("Intel Cooper Lake-SP")
+	.name = "Intel Cooper Lake-SP",
 	.enable_dev = chip_enable_dev,
 	.init = chip_init,
 	.final = chip_final,
diff --git a/src/soc/intel/xeon_sp/skx/chip.c b/src/soc/intel/xeon_sp/skx/chip.c
index b468842..68737ed 100644
--- a/src/soc/intel/xeon_sp/skx/chip.c
+++ b/src/soc/intel/xeon_sp/skx/chip.c
@@ -89,7 +89,7 @@
 }
 
 struct chip_operations soc_intel_xeon_sp_skx_ops = {
-	CHIP_NAME("Intel Skylake-SP")
+	.name = "Intel Skylake-SP",
 	.enable_dev = soc_enable_dev,
 	.init = soc_init,
 	.final = soc_final
diff --git a/src/soc/intel/xeon_sp/spr/chip.c b/src/soc/intel/xeon_sp/spr/chip.c
index 3b3c65e..abab0d2 100644
--- a/src/soc/intel/xeon_sp/spr/chip.c
+++ b/src/soc/intel/xeon_sp/spr/chip.c
@@ -159,7 +159,8 @@
 }
 
 struct chip_operations soc_intel_xeon_sp_spr_ops = {
-	CHIP_NAME("Intel SapphireRapids-SP").enable_dev = chip_enable_dev,
+	.name = "Intel SapphireRapids-SP",
+	.enable_dev = chip_enable_dev,
 	.init = chip_init,
 	.final = chip_final,
 };