blob: 41be94f35747743747946d9722f856e353f4c525 [file] [log] [blame]
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 secunet Security Networks AG
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <southbridge/intel/common/gpio.h>
#include <northbridge/intel/gm45/gm45.h>
void get_mb_spd_addrmap(u8 *spd_addrmap)
{
spd_addrmap[0] = 0x50;
spd_addrmap[2] = 0x51;
}
void mb_post_raminit_setup(void)
{
/* FIXME: make a proper SMBUS mux support. */
/* Set the SMBUS mux to the eeprom */
set_gpio(42, GPIO_LEVEL_LOW);
}