commit bf3f94dbb2832e43805c7533d6b5f8714b7398ef
author Martin Roth <gaumless@gmail.com> Sat Dec 31 16:31:01 2022 -0700
committer Martin L Roth <gaumless@gmail.com> Sun Jan 08 01:22:15 2023 +0000
tree 9ce6b350b9ab69eccb9f39eb5ac194bee27b80df
parent cba09c8f13218461c590fe75871f7b059cbc83f8

drivers/amd: Update to use defined post codes

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I2d5700534c07e89b3908a2e6b827db919a48795d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71591
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>

src/drivers/amd/agesa/cache_as_ram.S

diff --git a/src/drivers/amd/agesa/cache_as_ram.S b/src/drivers/amd/agesa/cache_as_ram.S
index 0d678d1..e342039 100644
--- a/src/drivers/amd/agesa/cache_as_ram.S
+++ b/src/drivers/amd/agesa/cache_as_ram.S
@@ -12,6 +12,7 @@
 
 #include <cpu/x86/lapic_def.h>
 #include <cpu/x86/post_code.h>
+#include <amdblocks/post_codes.h>
 
 .section .init
 
@@ -30,7 +31,7 @@
  */
 bootblock_pre_c_entry:
 
-	post_code(0xa0)
+	post_code(POST_BOOTBLOCK_PRE_C_ENTRY)
 
 	AMD_ENABLE_STACK
 
@@ -56,7 +57,7 @@
 	movd	%mm1, %eax
 	pushl	%eax		/* tsc[31:0] */
 
-	post_code(0xa2)
+	post_code(POST_BOOTBLOCK_PRE_C_DONE)
 
 	call	bootblock_c_entry