| commit | 3674ccfa3ef9fe9317bc9f9b7231e3b55452f1c4 | [log] [tgz] |
|---|---|---|
| author | Aaron Durbin <adurbin@chromium.org> | Mon Jan 27 16:39:17 2014 -0600 |
| committer | Aaron Durbin <adurbin@google.com> | Tue Jan 28 19:54:49 2014 +0100 |
| tree | 19cc70fc7cbcf07fc91509723341d5155608d272 | |
| parent | e6767674af95c7b5e9b508839b3aaf8b477921c4 [diff] |
x86/mtrr: don't assume size of ROM cached during CAR mode Romstage and ramstage can use 2 different values for the amount of ROM to cache just under 4GiB in the address space. Don't assume a cpu's romstage caching policy for the ROM. Change-Id: I689fdf4d1f78e9556b0bc258e05c7b9bb99c48e1 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4846 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>