commit bed1b602d0cb6027c1b796cb1e44f335e56e0471
author Lean Sheng Tan <lean.sheng.tan@intel.com> Wed Jun 16 09:41:37 2021 -0700
committer Werner Zeh <werner.zeh@siemens.com> Wed Jun 30 07:35:09 2021 +0000
tree ce30d40c1db81c2207ffbc1617a82ee9e6e336c6
parent 508dc163f183f99f4683365ef3a6443658979846

soc/intel/common: Refine pmc_get_xtal_freq function

1. Remove 'PCH_EPOC_XTAL_FREQ(__epoc)' macro since it only be used
   in 1 place.

2. Transform macro into more readable C code.

3. Add additional case check to make sure the returned value is
   defined in the 'pch_pmc_xtal' enum.

Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: If57a99bf8e837a6eb8f225297399b1f5363cfa85
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55587
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/soc/intel/common/block/include/intelblocks/pmclib.h

diff --git a/src/soc/intel/common/block/include/intelblocks/pmclib.h b/src/soc/intel/common/block/include/intelblocks/pmclib.h
index a54ae18..4972a09 100644
--- a/src/soc/intel/common/block/include/intelblocks/pmclib.h
+++ b/src/soc/intel/common/block/include/intelblocks/pmclib.h
@@ -7,19 +7,19 @@
 #include <types.h>
 
 #define PCH_PMC_EPOC			0x18EC
-/* XTAL frequency in bits 21, 20, 17 */
-#define PCH_EPOC_XTAL_FREQ(__epoc)	((((__epoc) >> 19) & 0x6) | ((__epoc) >> 17 & 0x1))
 
 /**
  * enum pch_pmc_xtal - External crystal oscillator frequency.
  * @XTAL_24_MHZ: 24 MHz external crystal.
  * @XTAL_19_2_MHZ: 19.2 MHz external crystal.
  * @XTAL_38_4_MHZ: 38.4 MHz external crystal.
+ * @XTAL_UNKNOWN_FREQ: Unsupported external crystal.
  */
 enum pch_pmc_xtal {
 	XTAL_24_MHZ,
 	XTAL_19_2_MHZ,
 	XTAL_38_4_MHZ,
+	XTAL_UNKNOWN_FREQ = 0xf,
 };
 
 /*

src/soc/intel/common/block/pmc/pmclib.c

diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index 64c25ff..81d25e0 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -732,7 +732,22 @@
 	if (!CONFIG(PMC_EPOC))
 		dead_code();
 
-	const uintptr_t pmcbase = soc_read_pmc_base();
+	uint32_t xtal_freq = 0;
+	const uint32_t epoc = read32p(soc_read_pmc_base() + PCH_PMC_EPOC);
 
-	return PCH_EPOC_XTAL_FREQ(read32((uint32_t *)(pmcbase + PCH_PMC_EPOC)));
+	/* XTAL frequency in bits 21, 20, 17 */
+	xtal_freq |= !!(epoc & (1 << 21)) << 2;
+	xtal_freq |= !!(epoc & (1 << 20)) << 1;
+	xtal_freq |= !!(epoc & (1 << 17)) << 0;
+	switch (xtal_freq) {
+	case 0:
+		return XTAL_24_MHZ;
+	case 1:
+		return XTAL_19_2_MHZ;
+	case 2:
+		return XTAL_38_4_MHZ;
+	default:
+		printk(BIOS_ERR, "Unknown EPOC XTAL frequency setting %u\n", xtal_freq);
+		return XTAL_UNKNOWN_FREQ;
+	}
 }