mb/google,intel: Fix indirect include bootmode.h

Change-Id: I9e7200d60db4333551e34a615433fa21c3135db6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/mainboard/intel/adlrvp/chromeos.c b/src/mainboard/intel/adlrvp/chromeos.c
index 244b942..85807a1 100644
--- a/src/mainboard/intel/adlrvp/chromeos.c
+++ b/src/mainboard/intel/adlrvp/chromeos.c
@@ -2,6 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
+#include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
 #include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/mainboard/intel/adlrvp/memory.c b/src/mainboard/intel/adlrvp/memory.c
index f93b361..93f1aa3a2 100644
--- a/src/mainboard/intel/adlrvp/memory.c
+++ b/src/mainboard/intel/adlrvp/memory.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <baseboard/variants.h>
+#include <console/console.h>
 #include <soc/romstage.h>
 
 #include "board_id.h"
diff --git a/src/mainboard/intel/adlrvp/ramstage.c b/src/mainboard/intel/adlrvp/ramstage.c
index 136fa45..22902bd 100644
--- a/src/mainboard/intel/adlrvp/ramstage.c
+++ b/src/mainboard/intel/adlrvp/ramstage.c
@@ -8,6 +8,7 @@
 #include <soc/gpio_soc_defs.h>
 #include <soc/pci_devs.h>
 #include <soc/soc_chip.h>
+#include <string.h>
 #include <drivers/intel/dptf/chip.h>
 #include "board_id.h"
 #include <intelblocks/power_limit.h>
diff --git a/src/mainboard/intel/coffeelake_rvp/chromeos.c b/src/mainboard/intel/coffeelake_rvp/chromeos.c
index 5fb7922..1e02e3d 100644
--- a/src/mainboard/intel/coffeelake_rvp/chromeos.c
+++ b/src/mainboard/intel/coffeelake_rvp/chromeos.c
@@ -2,6 +2,7 @@
 
 #include <acpi/acpi.h>
 #include <baseboard/variants.h>
+#include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
 #include <soc/gpio.h>
diff --git a/src/mainboard/intel/glkrvp/chromeos.c b/src/mainboard/intel/glkrvp/chromeos.c
index 5944406..7878a2a 100644
--- a/src/mainboard/intel/glkrvp/chromeos.c
+++ b/src/mainboard/intel/glkrvp/chromeos.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <baseboard/variants.h>
+#include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <ec/google/chromeec/ec.h>
 #include <gpio.h>
diff --git a/src/mainboard/intel/icelake_rvp/chromeos.c b/src/mainboard/intel/icelake_rvp/chromeos.c
index c98c4f8..8a8bc42 100644
--- a/src/mainboard/intel/icelake_rvp/chromeos.c
+++ b/src/mainboard/intel/icelake_rvp/chromeos.c
@@ -3,6 +3,7 @@
 #include <acpi/acpi.h>
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
+#include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
 #include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/mainboard/intel/jasperlake_rvp/chromeos.c b/src/mainboard/intel/jasperlake_rvp/chromeos.c
index c59fac8..320f92a 100644
--- a/src/mainboard/intel/jasperlake_rvp/chromeos.c
+++ b/src/mainboard/intel/jasperlake_rvp/chromeos.c
@@ -2,6 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
+#include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
 #include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/mainboard/intel/kblrvp/chromeos.c b/src/mainboard/intel/kblrvp/chromeos.c
index 270c84d..df01242 100644
--- a/src/mainboard/intel/kblrvp/chromeos.c
+++ b/src/mainboard/intel/kblrvp/chromeos.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <device/device.h>
 #include <gpio.h>
diff --git a/src/mainboard/intel/kunimitsu/chromeos.c b/src/mainboard/intel/kunimitsu/chromeos.c
index 3b8725f..3a99e25 100644
--- a/src/mainboard/intel/kunimitsu/chromeos.c
+++ b/src/mainboard/intel/kunimitsu/chromeos.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
 #include <soc/gpio.h>
diff --git a/src/mainboard/intel/shadowmountain/chromeos.c b/src/mainboard/intel/shadowmountain/chromeos.c
index 35a54a8..052191f 100644
--- a/src/mainboard/intel/shadowmountain/chromeos.c
+++ b/src/mainboard/intel/shadowmountain/chromeos.c
@@ -2,6 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
+#include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
 #include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/mainboard/intel/strago/chromeos.c b/src/mainboard/intel/strago/chromeos.c
index f01f7f1..c0ce968 100644
--- a/src/mainboard/intel/strago/chromeos.c
+++ b/src/mainboard/intel/strago/chromeos.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
 #include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/mainboard/intel/tglrvp/chromeos.c b/src/mainboard/intel/tglrvp/chromeos.c
index 7da61be..cb9af47 100644
--- a/src/mainboard/intel/tglrvp/chromeos.c
+++ b/src/mainboard/intel/tglrvp/chromeos.c
@@ -2,6 +2,7 @@
 
 #include <baseboard/gpio.h>
 #include <baseboard/variants.h>
+#include <bootmode.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
 #include <vendorcode/google/chromeos/chromeos.h>