commit bde6d309dfafe58732ec46314a2d4c08974b62d4
author Kevin Paul Herbert <kph@meraki.net> Wed Dec 24 18:43:20 2014 -0800
committer Alexandru Gagniuc <mr.nuke.me@gmail.com> Sun Feb 15 08:50:22 2015 +0100
tree 17ba00565487ddfbb5759c96adfbb3fffe2a4550
parent 4b10dec1a66122b515b2191f823d7fd379ec655f

x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer

On x86, change the type of the address parameter in
read8()/read16/read32()/write8()/write16()/write32() to be a
pointer, instead of unsigned long.

Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330
Signed-off-by: Kevin Paul Herbert <kph@meraki.net>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7784
Tested-by: build bot (Jenkins)

src/southbridge/amd/pi/hudson/enable_usbdebug.c

diff --git a/src/southbridge/amd/pi/hudson/enable_usbdebug.c b/src/southbridge/amd/pi/hudson/enable_usbdebug.c
index 258267e..9deeb45 100644
--- a/src/southbridge/amd/pi/hudson/enable_usbdebug.c
+++ b/src/southbridge/amd/pi/hudson/enable_usbdebug.c
@@ -40,7 +40,7 @@
 
 void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
 {
-	u32 base_regs = pci_ehci_base_regs(dev);
+	u8 *base_regs = pci_ehci_base_regs(dev);
 	u32 reg32;
 
 	/* Write the port number to DEBUGPORT_MISC_CONTROL[31:28]. */

src/southbridge/amd/pi/hudson/hudson.c

diff --git a/src/southbridge/amd/pi/hudson/hudson.c b/src/southbridge/amd/pi/hudson/hudson.c
index e5382b4..5c55065 100644
--- a/src/southbridge/amd/pi/hudson/hudson.c
+++ b/src/southbridge/amd/pi/hudson/hudson.c
@@ -47,22 +47,22 @@
 
 void pm_write8(u8 reg, u8 value)
 {
-	write8(PM_MMIO_BASE + reg, value);
+	write8((void *)(PM_MMIO_BASE + reg), value);
 }
 
 u8 pm_read8(u8 reg)
 {
-	return read8(PM_MMIO_BASE + reg);
+	return read8((void *)(PM_MMIO_BASE + reg));
 }
 
 void pm_write16(u8 reg, u16 value)
 {
-	write16(PM_MMIO_BASE + reg, value);
+	write16((void *)(PM_MMIO_BASE + reg), value);
 }
 
 u16 pm_read16(u16 reg)
 {
-	return read16(PM_MMIO_BASE + reg);
+	return read16((void *)(PM_MMIO_BASE + reg));
 }
 
 void hudson_enable(device_t dev)

src/southbridge/amd/pi/hudson/sm.c

diff --git a/src/southbridge/amd/pi/hudson/sm.c b/src/southbridge/amd/pi/hudson/sm.c
index d6ca215..bc6564d 100644
--- a/src/southbridge/amd/pi/hudson/sm.c
+++ b/src/southbridge/amd/pi/hudson/sm.c
@@ -82,7 +82,7 @@
 
 static void sm_init(device_t dev)
 {
-	setup_ioapic(IO_APIC_ADDR, CONFIG_MAX_CPUS);
+	setup_ioapic(VIO_APIC_VADDR, CONFIG_MAX_CPUS);
 }
 
 static int lsmbus_recv_byte(device_t dev)

src/southbridge/amd/pi/hudson/smi.h

diff --git a/src/southbridge/amd/pi/hudson/smi.h b/src/southbridge/amd/pi/hudson/smi.h
index de987a9..2296c6e 100644
--- a/src/southbridge/amd/pi/hudson/smi.h
+++ b/src/southbridge/amd/pi/hudson/smi.h
@@ -36,22 +36,22 @@
 
 static inline uint32_t smi_read32(uint8_t offset)
 {
-	return read32(SMI_BASE + offset);
+	return read32((void *)(SMI_BASE + offset));
 }
 
 static inline void smi_write32(uint8_t offset, uint32_t value)
 {
-	write32(SMI_BASE + offset, value);
+	write32((void *)(SMI_BASE + offset), value);
 }
 
 static inline uint16_t smi_read16(uint8_t offset)
 {
-	return read16(SMI_BASE + offset);
+	return read16((void *)(SMI_BASE + offset));
 }
 
 static inline void smi_write16(uint8_t offset, uint16_t value)
 {
-	write16(SMI_BASE + offset, value);
+	write16((void *)(SMI_BASE + offset), value);
 }
 
 void hudson_configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);