mb/google/cherry: fix GPIO polarity for TPM interrupt
The GPIO_GSC_AP_INT itself is active low, but the payloads will
create the IRQ using its eint driver, which is active high.
BUG=b:188392736
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ie39f3b9a5dbe15057ef3e96f6c99211949692003
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55562
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
diff --git a/src/mainboard/google/cherry/chromeos.c b/src/mainboard/google/cherry/chromeos.c
index 8d43354..8f0e9ae 100644
--- a/src/mainboard/google/cherry/chromeos.c
+++ b/src/mainboard/google/cherry/chromeos.c
@@ -26,7 +26,11 @@
{GPIO_SD_CD.id, ACTIVE_LOW, -1, "SD card detect"},
{GPIO_BEEP_ON.id, ACTIVE_HIGH, -1, "beep enable"},
{GPIO_EC_IN_RW.id, ACTIVE_LOW, -1, "EC in RW"},
- {GPIO_GSC_AP_INT.id, ACTIVE_LOW, -1, "TPM interrupt"},
+ /*
+ * The GPIO_GSC_AP_INT itself is active low, but the payloads will
+ * create the IRQ using its eint driver, which is active high.
+ */
+ {GPIO_GSC_AP_INT.id, ACTIVE_HIGH, -1, "TPM interrupt"},
{GPIO_EN_SPK.id, ACTIVE_HIGH, -1, "speaker enable"},
};
lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));