| commit | bceea67461cc44e2c8f10e5d811dcbdc0351ee56 | [log] [tgz] |
|---|---|---|
| author | Angel Pons <th3fanbus@gmail.com> | Mon May 17 10:58:36 2021 +0200 |
| committer | Patrick Georgi <pgeorgi@google.com> | Tue May 18 11:42:36 2021 +0000 |
| tree | d5fd19bc322249f33899362bcb3255e1bb421ebb | |
| parent | d2489ee7128d000bb2eb22b0cfe2da5db605aa79 [diff] [blame] |
mainboard: Use decimal for `device domain 0x0 on` Most boards use `device domain 0 on` with zero written in decimal. For the sake of consistency, update the remaining boards to follow suit. Change-Id: I6e2f0a19d57cfe6fc4e4ac4d14310133ad6b01d8 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54358 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/mainboard/sapphire/pureplatinumh61/devicetree.cb b/src/mainboard/sapphire/pureplatinumh61/devicetree.cb index adc65cf..253e5ed 100644 --- a/src/mainboard/sapphire/pureplatinumh61/devicetree.cb +++ b/src/mainboard/sapphire/pureplatinumh61/devicetree.cb
@@ -10,7 +10,7 @@ device lapic 0xacac off end end end - device domain 0x0 on + device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH register "c2_latency" = "0x0065" register "gen1_dec" = "0x000c0291"